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/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt2701-hifsys.yaml4 $id: http://devicetree.org/schemas/clock/mediatek,mt2701-hifsys.yaml#
7 title: MediaTek HIFSYS clock and reset controller
10 The MediaTek HIFSYS controller provides various clocks and reset outputs to
20 - mediatek,mt2701-hifsys
21 - mediatek,mt7622-hifsys
24 - mediatek,mt7623-hifsys
25 - const: mediatek,mt2701-hifsys
46 compatible = "mediatek,mt2701-hifsys";
/linux/drivers/clk/mediatek/
H A Dclk-mt2701-hif.c46 { .compatible = "mediatek,mt2701-hifsys", .data = &hif_desc },
61 MODULE_DESCRIPTION("MediaTek MT2701 HIFSYS clocks driver");
H A DKconfig48 bool "Clock driver for MediaTek MT2701 hifsys"
51 This driver supports MediaTek MT2701 hifsys clocks.
393 tristate "Clock driver for MediaTek MT7622 HIFSYS"
396 This driver supports MediaTek MT7622 HIFSYS clocks providing
423 bool "Clock driver for MediaTek MT7629 HIFSYS"
426 This driver supports MediaTek MT7629 HIFSYS clocks providing
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7623.dtsi745 hifsys: syscon@1a000000 { label
746 compatible = "mediatek,mt7623-hifsys",
747 "mediatek,mt2701-hifsys";
769 <&hifsys CLK_HIFSYS_PCIE0>,
770 <&hifsys CLK_HIFSYS_PCIE1>,
771 <&hifsys CLK_HIFSYS_PCIE2>;
773 resets = <&hifsys MT2701_HIFSYS_PCIE0_RST>,
774 <&hifsys MT2701_HIFSYS_PCIE1_RST>,
775 <&hifsys MT2701_HIFSYS_PCIE2_RST>;
864 clocks = <&hifsys CLK_HIFSYS_USB0PHY>,
[all …]
H A Dmt2701.dtsi599 hifsys: syscon@1a000000 { label
600 compatible = "mediatek,mt2701-hifsys";
612 clocks = <&hifsys CLK_HIFSYS_USB0PHY>,
652 clocks = <&hifsys CLK_HIFSYS_USB1PHY>,
/linux/include/dt-bindings/reset/
H A Dmt2701-resets.h66 /* HIFSYS resets */
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi923 hifsys: clock-controller@1af00000 { label
924 compatible = "mediatek,mt7622-hifsys";
995 mediatek,hifsys = <&hifsys>;
/linux/drivers/net/ethernet/mediatek/
H A Dmtk_wed.c1152 if (of_dma_is_coherent(wlan_node) && hw->hifsys) in __mtk_wed_detach()
1153 regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP, in __mtk_wed_detach()
2453 regmap_update_bits(hw->hifsys, HIFSYS_DMA_AG_MAP, in mtk_wed_attach()
2850 hw->hifsys = syscon_regmap_lookup_by_phandle(eth_np, in mtk_wed_add_hw()
2851 "mediatek,hifsys"); in mtk_wed_add_hw()
2852 if (IS_ERR(hw->mirror) || IS_ERR(hw->hifsys)) { in mtk_wed_add_hw()
/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h406 /* HIFSYS */