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Searched +full:hi6220 +full:- +full:aoctrl (Results 1 – 4 of 4) sorted by relevance

/linux/Documentation/devicetree/bindings/arm/hisilicon/controller/
H A Dhi6220-domain-ctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/hi6220-domain-ctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hisilicon Hi6220 domain controller
10 - Wei Xu <xuwei5@hisilicon.com>
19 Power Always ON domain controller --> hisilicon,hi6220-aoctrl
20 Media domain controller --> hisilicon,hi6220-mediactrl
21 Power Management domain controller --> hisilicon,hi6220-pmctrl
26 - enum:
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/linux/Documentation/devicetree/bindings/clock/
H A Dhi6220-clock.txt1 * Hisilicon Hi6220 Clock Controller
3 Clock control registers reside in different Hi6220 system controllers,
11 - compatible: the compatible should be one of the following strings to
14 - "hisilicon,hi6220-acpu-sctrl"
15 - "hisilicon,hi6220-aoctrl"
16 - "hisilicon,hi6220-sysctrl"
17 - "hisilicon,hi6220-mediactrl"
18 - "hisilicon,hi6220-pmctrl"
19 - "hisilicon,hi6220-stub-clk"
21 - reg: physical base address of the controller and length of memory mapped
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/linux/drivers/reset/hisilicon/
H A Dhi6220_reset.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Hisilicon Hi6220 reset controller driver
6 * Copyright (c) 2015-2016 HiSilicon Limited.
18 #include <linux/reset-controller.h>
47 struct regmap *regmap = data->regmap; in hi6220_peripheral_assert()
59 struct regmap *regmap = data->regmap; in hi6220_peripheral_deassert()
76 struct regmap *regmap = data->regmap; in hi6220_media_assert()
85 struct regmap *regmap = data->regmap; in hi6220_media_deassert()
109 struct regmap *regmap = data->regmap; in hi6220_ao_assert()
128 struct regmap *regmap = data->regmap; in hi6220_ao_deassert()
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/linux/drivers/clk/hisilicon/
H A Dclk-hi6220.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Hisilicon Hi6220 clock driver
11 #include <linux/clk-provider.h>
16 #include <dt-bindings/clock/hi6220-clock.h>
87 CLK_OF_DECLARE_DRIVER(hi6220_clk_ao, "hisilicon,hi6220-aoctrl", hi6220_clk_ao_init);
194 CLK_OF_DECLARE_DRIVER(hi6220_clk_sys, "hisilicon,hi6220-sysctrl", hi6220_clk_sys_init);
251 CLK_OF_DECLARE_DRIVER(hi6220_clk_media, "hisilicon,hi6220-mediactrl", hi6220_clk_media_init);
282 CLK_OF_DECLARE(hi6220_clk_power, "hisilicon,hi6220-pmctrl", hi6220_clk_power_init);
304 CLK_OF_DECLARE(hi6220_clk_acpu, "hisilicon,hi6220-acpu-sctrl", hi6220_clk_acpu_init);