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/linux/drivers/gpu/drm/sun4i/
H A Dsun4i_hdmi_i2c.c25 static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool read) in fifo_transfer() argument
41 (hdmi->variant->ddc_fifo_thres_incl ? 0 : 1); in fifo_transfer()
50 if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg, in fifo_transfer()
59 ioread8_rep(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
61 iowrite8_rep(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
64 regmap_field_force_write(hdmi->field_ddc_int_status, in fifo_transfer()
70 static int xfer_msg(struct sun4i_hdmi *hdmi, struct i2c_msg *msg) in xfer_msg() argument
76 if (hdmi->variant->ddc_fifo_has_dir) { in xfer_msg()
77 reg = readl(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG); in xfer_msg()
82 writel(reg, hdmi->base + SUN4I_HDMI_DDC_CTRL_REG); in xfer_msg()
[all …]
H A Dsun8i_dw_hdmi.c22 struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder); in sun8i_dw_hdmi_encoder_mode_set() local
24 clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000); in sun8i_dw_hdmi_encoder_mode_set()
33 sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data, in sun8i_dw_hdmi_mode_valid_a83t() argument
44 sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data, in sun8i_dw_hdmi_mode_valid_h6() argument
104 struct sun8i_dw_hdmi *hdmi; in sun8i_dw_hdmi_bind() local
110 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); in sun8i_dw_hdmi_bind()
111 if (!hdmi) in sun8i_dw_hdmi_bind()
114 plat_data = &hdmi->plat_data; in sun8i_dw_hdmi_bind()
115 hdmi->dev = &pdev->dev; in sun8i_dw_hdmi_bind()
116 encoder = &hdmi->encoder; in sun8i_dw_hdmi_bind()
[all …]
H A Dsun8i_hdmi_phy.c142 static int sun8i_a83t_hdmi_phy_config(struct dw_hdmi *hdmi, void *data, in sun8i_a83t_hdmi_phy_config() argument
156 dw_hdmi_phy_gen2_txpwron(hdmi, 0); in sun8i_a83t_hdmi_phy_config()
157 dw_hdmi_phy_gen2_pddq(hdmi, 1); in sun8i_a83t_hdmi_phy_config()
159 dw_hdmi_phy_gen2_reset(hdmi); in sun8i_a83t_hdmi_phy_config()
161 dw_hdmi_phy_gen2_pddq(hdmi, 0); in sun8i_a83t_hdmi_phy_config()
163 dw_hdmi_phy_i2c_set_addr(hdmi, I2C_ADDR); in sun8i_a83t_hdmi_phy_config()
166 * Values are taken from BSP HDMI driver. Although AW didn't in sun8i_a83t_hdmi_phy_config()
171 dw_hdmi_phy_i2c_write(hdmi, 0x01e0, 0x06); in sun8i_a83t_hdmi_phy_config()
172 dw_hdmi_phy_i2c_write(hdmi, 0x0000, 0x15); in sun8i_a83t_hdmi_phy_config()
173 dw_hdmi_phy_i2c_write(hdmi, 0x08da, 0x10); in sun8i_a83t_hdmi_phy_config()
[all …]
H A Dsun4i_hdmi_tmds_clk.c16 struct sun4i_hdmi *hdmi; member
78 * clocked from it, and to have the same rate than our HDMI in sun4i_tmds_determine_rate()
131 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG); in sun4i_tmds_recalc_rate()
135 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_CTRL_REG); in sun4i_tmds_recalc_rate()
154 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG); in sun4i_tmds_set_rate()
158 writel(reg, tmds->hdmi->base + SUN4I_HDMI_PAD_CTRL1_REG); in sun4i_tmds_set_rate()
160 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_CTRL_REG); in sun4i_tmds_set_rate()
163 tmds->hdmi->base + SUN4I_HDMI_PLL_CTRL_REG); in sun4i_tmds_set_rate()
173 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_DBG0_REG); in sun4i_tmds_get_parent()
186 reg = readl(tmds->hdmi->base + SUN4I_HDMI_PLL_DBG0_REG); in sun4i_tmds_set_parent()
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/linux/drivers/gpu/drm/rockchip/
H A Ddw_hdmi_qp-rockchip.c17 #include <linux/phy/phy-hdmi.h>
95 struct dw_hdmi_qp *hdmi; member
105 void (*io_init)(struct rockchip_hdmi_qp *hdmi);
106 void (*enc_init)(struct rockchip_hdmi_qp *hdmi, struct rockchip_crtc_state *state);
120 struct rockchip_hdmi_qp *hdmi = to_rockchip_hdmi_qp(encoder); in dw_hdmi_qp_rockchip_encoder_enable() local
124 gpiod_set_value_cansleep(hdmi->frl_enable_gpio, 0); in dw_hdmi_qp_rockchip_encoder_enable()
129 if (hdmi->ctrl_ops->enc_init) in dw_hdmi_qp_rockchip_encoder_enable()
130 hdmi->ctrl_ops->enc_init(hdmi, to_rockchip_crtc_state(crtc->state)); in dw_hdmi_qp_rockchip_encoder_enable()
138 struct rockchip_hdmi_qp *hdmi = to_rockchip_hdmi_qp(encoder); in dw_hdmi_qp_rockchip_encoder_atomic_check() local
143 if (hdmi->tmds_char_rate == conn_state->hdmi.tmds_char_rate && in dw_hdmi_qp_rockchip_encoder_atomic_check()
[all …]
/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-qp.c10 #include <linux/hdmi.h>
34 #include <sound/hdmi-codec.h>
36 #include "dw-hdmi-qp.h"
51 * the recommended N values specified in the Audio chapter of the HDMI
98 /* For 297 MHz+ HDMI spec have some other rule for setting N */
107 * These are the CTS values as recommended in the Audio chapter of the HDMI
174 static void dw_hdmi_qp_write(struct dw_hdmi_qp *hdmi, unsigned int val, in dw_hdmi_qp_write() argument
177 regmap_write(hdmi->regm, offset, val); in dw_hdmi_qp_write()
180 static unsigned int dw_hdmi_qp_read(struct dw_hdmi_qp *hdmi, int offset) in dw_hdmi_qp_read() argument
184 regmap_read(hdmi->regm, offset, &val); in dw_hdmi_qp_read()
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H A Ddw-hdmi-i2s-audio.c3 * dw-hdmi-i2s-audio.c
15 #include <sound/hdmi-codec.h>
17 #include "dw-hdmi.h"
18 #include "dw-hdmi-audio.h"
20 #define DRIVER_NAME "dw-hdmi-i2s-audio"
25 struct dw_hdmi *hdmi = audio->hdmi; in hdmi_write() local
27 audio->write(hdmi, val, offset); in hdmi_write()
32 struct dw_hdmi *hdmi = audio->hdmi; in hdmi_read() local
34 return audio->read(hdmi, offset); in hdmi_read()
42 struct dw_hdmi *hdmi = audio->hdmi; in dw_hdmi_i2s_hw_params() local
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/linux/sound/hda/codecs/hdmi/
H A Dnvhdmi.c3 * Nvidia HDMI codec support
145 HDA_CODEC_ID_MODEL(0x10de0008, "GPU 08 HDMI/DP", MODEL_LEGACY),
146 HDA_CODEC_ID_MODEL(0x10de0009, "GPU 09 HDMI/DP", MODEL_LEGACY),
147 HDA_CODEC_ID_MODEL(0x10de000a, "GPU 0a HDMI/DP", MODEL_LEGACY),
148 HDA_CODEC_ID_MODEL(0x10de000b, "GPU 0b HDMI/DP", MODEL_LEGACY),
149 HDA_CODEC_ID_MODEL(0x10de000c, "MCP89 HDMI", MODEL_LEGACY),
150 HDA_CODEC_ID_MODEL(0x10de000d, "GPU 0d HDMI/DP", MODEL_LEGACY),
151 HDA_CODEC_ID_MODEL(0x10de0010, "GPU 10 HDMI/DP", MODEL_LEGACY),
152 HDA_CODEC_ID_MODEL(0x10de0011, "GPU 11 HDMI/DP", MODEL_LEGACY),
153 HDA_CODEC_ID_MODEL(0x10de0012, "GPU 12 HDMI/DP", MODEL_LEGACY),
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H A DKconfig4 tristate "HD-audio HDMI codec support"
6 Say Y or M here to include HD-audio HDMI/DislayPort codec support.
8 This will enable all HDMI/DP codec drivers as default, but you can
15 tristate "Generic HDMI/DisplayPort HD-audio codec support" if EXPERT
20 Say Y or M here to include Generic HDMI and DisplayPort HD-audio
27 tristate "Simple HDMI/DisplayPort HD-audio codec support" if EXPERT
30 Say Y or M here to include Simple HDMI and DisplayPort HD-audio
34 tristate "Intel HDMI/DisplayPort HD-audio codec support" if EXPERT
38 Say Y or M here to include Intel graphics HDMI and DisplayPort
42 bool "Enable Silent Stream always for HDMI"
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/linux/drivers/video/fbdev/omap2/omapfb/dss/
H A Dhdmi5.c3 * HDMI driver for OMAP5
14 #define DSS_SUBSYS_NAME "HDMI"
32 #include <sound/omap-hdmi-audio.h>
38 static struct omap_hdmi hdmi; variable
46 r = pm_runtime_resume_and_get(&hdmi.pdev->dev); in hdmi_runtime_get()
59 r = pm_runtime_put_sync(&hdmi.pdev->dev); in hdmi_runtime_put()
88 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL); in hdmi_irq_handler()
91 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); in hdmi_irq_handler()
98 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); in hdmi_irq_handler()
113 if (hdmi.vdda_reg != NULL) in hdmi_init_regulator()
[all …]
H A Dhdmi4.c3 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
9 #define DSS_SUBSYS_NAME "HDMI"
27 #include <sound/omap-hdmi-audio.h>
32 #include "hdmi.h"
34 static struct omap_hdmi hdmi; variable
42 r = pm_runtime_resume_and_get(&hdmi.pdev->dev); in hdmi_runtime_get()
55 r = pm_runtime_put_sync(&hdmi.pdev->dev); in hdmi_runtime_put()
94 if (hdmi.vdda_reg != NULL) in hdmi_init_regulator()
97 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda"); in hdmi_init_regulator()
105 hdmi.vdda_reg = reg; in hdmi_init_regulator()
[all …]
/linux/drivers/gpu/drm/mediatek/
H A Dmtk_hdmi_common.c10 #include <linux/hdmi.h>
17 #include <sound/hdmi-codec.h>
26 /* Recommended N values from HDMI specification, tables 7-1 to 7-3 */
38 * hdmi_recommended_n() - Return N value recommended by HDMI specification
104 int mtk_hdmi_audio_params(struct mtk_hdmi *hdmi, in mtk_hdmi_audio_params() argument
111 dev_dbg(hdmi->dev, "%s: %u Hz, %d bit, %d channels\n", __func__, in mtk_hdmi_audio_params()
114 if (!hdmi->bridge.encoder) in mtk_hdmi_audio_params()
131 dev_err(hdmi->dev, "channel[%d] not supported!\n", chan); in mtk_hdmi_audio_params()
145 dev_err(hdmi->dev, "rate[%d] not supported!\n", in mtk_hdmi_audio_params()
164 dev_err(hdmi->dev, "%s: Invalid DAI format %d\n", __func__, in mtk_hdmi_audio_params()
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/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_hdcp.c5 #include "hdmi.h"
21 /* QFPROM Registers for HDMI/HDCP */
49 struct hdmi *hdmi; member
78 static int msm_hdmi_ddc_read(struct hdmi *hdmi, u16 addr, u8 offset, in msm_hdmi_ddc_read() argument
99 rc = i2c_transfer(hdmi->i2c, msgs, 2); in msm_hdmi_ddc_read()
116 static int msm_hdmi_ddc_write(struct hdmi *hdmi, u16 addr, u8 offset, in msm_hdmi_ddc_write() argument
141 rc = i2c_transfer(hdmi->i2c, msgs, 1); in msm_hdmi_ddc_write()
159 struct hdmi *hdmi = hdcp_ctrl->hdmi; in msm_hdmi_hdcp_scm_wr() local
167 phy_addr = (u32)hdmi->mmio_phy_addr; in msm_hdmi_hdcp_scm_wr()
190 hdmi_write(hdmi, preg[i], pdata[i]); in msm_hdmi_hdcp_scm_wr()
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/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos-hdmi.yaml4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
7 title: Samsung Exynos SoC HDMI
18 - samsung,exynos4210-hdmi
19 - samsung,exynos4212-hdmi
20 - samsung,exynos5420-hdmi
21 - samsung,exynos5433-hdmi
34 Phandle to the HDMI DDC node.
36 hdmi-en-supply:
38 Provides voltage source for DCC lines available on HDMI connector. When
40 HPD (hot plug detect) line, what causes HDMI block to stay turned off.
[all …]
/linux/Documentation/devicetree/bindings/display/bridge/
H A Drenesas,dw-hdmi.yaml4 $id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
7 title: Renesas R-Car DWC HDMI TX Encoder
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: synopsys,dw-hdmi.yaml#
23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX
24 - renesas,r8a774b1-hdmi # for RZ/G2N compatible HDMI TX
25 - renesas,r8a774e1-hdmi # for RZ/G2H compatible HDMI TX
26 - renesas,r8a7795-hdmi # for R-Car H3 compatible HDMI TX
27 - renesas,r8a7796-hdmi # for R-Car M3-W compatible HDMI TX
28 - renesas,r8a77961-hdmi # for R-Car M3-W+ compatible HDMI TX
[all …]
/linux/sound/soc/mediatek/mt8183/
H A Dmt8183-dai-tdm.c347 {"HDMI_CH0_MUX", "CH0", "HDMI"},
348 {"HDMI_CH0_MUX", "CH1", "HDMI"},
349 {"HDMI_CH0_MUX", "CH2", "HDMI"},
350 {"HDMI_CH0_MUX", "CH3", "HDMI"},
351 {"HDMI_CH0_MUX", "CH4", "HDMI"},
352 {"HDMI_CH0_MUX", "CH5", "HDMI"},
353 {"HDMI_CH0_MUX", "CH6", "HDMI"},
354 {"HDMI_CH0_MUX", "CH7", "HDMI"},
356 {"HDMI_CH1_MUX", "CH0", "HDMI"},
357 {"HDMI_CH1_MUX", "CH1", "HDMI"},
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/linux/drivers/gpu/drm/sti/
H A Dsti_hdmi_tx3g4c28phy.c70 * sti_hdmi_tx3g4c28phy_start - Start hdmi phy macro cell tx3g4c28
72 * @hdmi: pointer on the hdmi internal structure
76 static bool sti_hdmi_tx3g4c28phy_start(struct sti_hdmi *hdmi) in sti_hdmi_tx3g4c28phy_start() argument
78 u32 ckpxpll = hdmi->mode.clock * 1000; in sti_hdmi_tx3g4c28phy_start()
116 hdmi->event_received = false; in sti_hdmi_tx3g4c28phy_start()
118 hdmi_write(hdmi, (pllctrl | PLL_CFG_EN), HDMI_SRZ_PLL_CFG); in sti_hdmi_tx3g4c28phy_start()
121 wait_event_interruptible_timeout(hdmi->wait_event, in sti_hdmi_tx3g4c28phy_start()
122 hdmi->event_received == true, in sti_hdmi_tx3g4c28phy_start()
126 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) == 0) { in sti_hdmi_tx3g4c28phy_start()
127 DRM_ERROR("hdmi phy pll not locked\n"); in sti_hdmi_tx3g4c28phy_start()
[all …]
/linux/sound/soc/mediatek/mt8192/
H A Dmt8192-dai-tdm.c395 {"HDMI_CH0_MUX", "CH0", "HDMI"},
396 {"HDMI_CH0_MUX", "CH1", "HDMI"},
397 {"HDMI_CH0_MUX", "CH2", "HDMI"},
398 {"HDMI_CH0_MUX", "CH3", "HDMI"},
399 {"HDMI_CH0_MUX", "CH4", "HDMI"},
400 {"HDMI_CH0_MUX", "CH5", "HDMI"},
401 {"HDMI_CH0_MUX", "CH6", "HDMI"},
402 {"HDMI_CH0_MUX", "CH7", "HDMI"},
404 {"HDMI_CH1_MUX", "CH0", "HDMI"},
405 {"HDMI_CH1_MUX", "CH1", "HDMI"},
[all …]
/linux/sound/pci/oxygen/
H A Dxonar_hdmi.c3 * helper functions for HDMI models (Xonar HDAV1.3/HDAV1.3 Slim)
37 struct xonar_hdmi *hdmi) in xonar_hdmi_init_commands() argument
46 hdmi_write_command(chip, 0x54, 5, hdmi->params); in xonar_hdmi_init_commands()
49 void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *hdmi) in xonar_hdmi_init() argument
51 hdmi->params[1] = IEC958_AES3_CON_FS_48000; in xonar_hdmi_init()
52 hdmi->params[4] = 1; in xonar_hdmi_init()
53 xonar_hdmi_init_commands(chip, hdmi); in xonar_hdmi_init()
63 void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi) in xonar_hdmi_resume() argument
65 xonar_hdmi_init_commands(chip, hdmi); in xonar_hdmi_resume()
80 void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi, in xonar_set_hdmi_params() argument
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-boneblack.dts10 #include "am335x-boneblack-hdmi.dtsi"
50 "[hdmi cec]",
92 "[hdmi irq]",
94 "[hdmi audio]",
109 "P8_45 [hdmi]",
110 "P8_46 [hdmi]",
111 "P8_43 [hdmi]",
112 "P8_44 [hdmi]",
113 "P8_41 [hdmi]",
114 "P8_42 [hdmi]",
[all …]
/linux/sound/soc/codecs/
H A Dhdac_hdmi.c3 * hdac_hdmi.c - ASoc HDA-HDMI codec driver for Intel platforms
17 #include <linux/hdmi.h>
143 hdac_hdmi_get_pcm_from_cvt(struct hdac_hdmi_priv *hdmi, in hdac_hdmi_get_pcm_from_cvt() argument
148 list_for_each_entry(pcm, &hdmi->pcm_list, head) { in hdac_hdmi_get_pcm_from_cvt()
281 static struct hdac_hdmi_pcm *get_hdmi_pcm_from_id(struct hdac_hdmi_priv *hdmi, in get_hdmi_pcm_from_id() argument
286 list_for_each_entry(pcm, &hdmi->pcm_list, head) { in get_hdmi_pcm_from_id()
348 u8 CC02_CT47; /* match with HDMI infoframe from this on */
362 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); in hdac_hdmi_setup_audio_infoframe() local
375 hdmi->chmap.ops.set_channel_count(hdev, cvt->nid, channels); in hdac_hdmi_setup_audio_infoframe()
377 snd_hdac_setup_channel_mapping(&hdmi in hdac_hdmi_setup_audio_infoframe()
441 struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai); hdac_hdmi_set_stream() local
467 struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai); hdac_hdmi_set_hw_params() local
527 hdac_hdmi_get_port_from_cvt(struct hdac_device * hdev,struct hdac_hdmi_priv * hdmi,struct hdac_hdmi_cvt * cvt) hdac_hdmi_get_port_from_cvt() argument
566 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_verify_connect_sel_all_pins() local
591 struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai); hdac_hdmi_pcm_open() local
634 struct hdac_hdmi_priv *hdmi = snd_soc_dai_get_drvdata(dai); hdac_hdmi_pcm_close() local
658 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_query_cvt_params() local
721 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_get_pcm() local
818 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_cvt_output_widget_event() local
908 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_set_pin_port_mux() local
966 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_create_pin_port_muxs() local
1033 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_add_pinmux_cvt_route() local
1076 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); create_fill_widget_route_map() local
1177 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_init_dai_map() local
1204 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_add_cvt() local
1256 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_present_sense() local
1367 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_add_pin() local
1399 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_skl_enable_all_pins() local
1417 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_skl_enable_dp12() local
1447 hdac_hdmi_create_dais(struct hdac_device * hdev,struct snd_soc_dai_driver ** dais,struct hdac_hdmi_priv * hdmi,int num_dais) hdac_hdmi_create_dais() argument
1519 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_parse_and_map_nid() local
1586 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_eld_notify_cb() local
1642 hdac_hdmi_present_sense_all_pins(struct hdac_device * hdev,struct hdac_hdmi_priv * hdmi,bool detect_pin_caps) hdac_hdmi_present_sense_all_pins() argument
1667 struct hdac_hdmi_priv *hdmi = snd_soc_component_get_drvdata(component); hdmi_codec_probe() local
1727 struct hdac_hdmi_priv *hdmi = snd_soc_component_get_drvdata(component); hdmi_codec_remove() local
1742 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdmi_codec_resume() local
1772 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_get_chmap() local
1781 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_set_chmap() local
1802 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); is_hdac_hdmi_pcm_attached() local
1816 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); hdac_hdmi_get_spk_alloc() local
1913 struct hdac_hdmi_priv *hdmi = hdev_to_hdmi_priv(hdev); clear_dapm_works() local
[all...]
/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-hdmi.yaml4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-hdmi.yaml#
7 title: Allwinner A10 HDMI Controller
10 The HDMI Encoder supports the HDMI video and audio outputs, and does
20 - const: allwinner,sun4i-a10-hdmi
21 - const: allwinner,sun5i-a10s-hdmi
22 - const: allwinner,sun6i-a31-hdmi
24 - const: allwinner,sun7i-a20-hdmi
25 - const: allwinner,sun5i-a10s-hdmi
36 - description: The HDMI interface clock
37 - description: The HDMI module clock
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dimx-audio-hdmi.yaml4 $id: http://devicetree.org/schemas/sound/imx-audio-hdmi.yaml#
7 title: NXP i.MX audio complex with HDMI
15 - fsl,imx-audio-hdmi
26 hdmi-out:
30 of HDMI will be enabled, indicating there's a physical HDMI out
32 block, such as an HDMI encoder or display-controller.
34 hdmi-in:
38 HDMI will be enabled, indicating there is a physical HDMI in
50 sound-hdmi {
51 compatible = "fsl,imx-audio-hdmi";
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Damlogic,meson8-hdmi-tx-phy.yaml4 $id: http://devicetree.org/schemas/phy/amlogic,meson8-hdmi-tx-phy.yaml#
7 title: Amlogic Meson8, Meson8b and Meson8m2 HDMI TX PHY
13 The HDMI TX PHY node should be the child of a syscon node with the
23 pattern: "^hdmi-phy@[0-9a-f]+$"
29 - amlogic,meson8b-hdmi-tx-phy
30 - amlogic,meson8m2-hdmi-tx-phy
31 - const: amlogic,meson8-hdmi-tx-phy
32 - const: amlogic,meson8-hdmi-tx-phy
40 HDMI TMDS clock
53 hdmi-phy@3a0 {
[all …]
/linux/Documentation/devicetree/bindings/display/imx/
H A Dfsl,imx6-hdmi.yaml4 $id: http://devicetree.org/schemas/display/imx/fsl,imx6-hdmi.yaml#
7 title: Freescale i.MX6 DWC HDMI TX Encoder
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: ../bridge/synopsys,dw-hdmi.yaml#
22 - fsl,imx6dl-hdmi
23 - fsl,imx6q-hdmi
37 phandle to the iomuxc-gpr region containing the HDMI multiplexer control
44 HDMI multiplexer. Each port shall have a single endpoint.
49 description: First input of the HDMI multiplexer
53 description: Second input of the HDMI multiplexer
[all …]

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