| /linux/drivers/gpu/drm/bridge/synopsys/ |
| H A D | dw-hdmi.c | 3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
13 #include <linux/hdmi.h>
40 #include "dw-hdmi-audio.h"
41 #include "dw-hdmi-cec.h"
42 #include "dw-hdmi.h"
49 /* DW-HDMI Controller >= 0x200a are at least compliant with SCDC version 1 */
127 int (*configure)(struct dw_hdmi *hdmi,
190 void (*enable_audio)(struct dw_hdmi *hdmi);
191 void (*disable_audio)(struct dw_hdmi *hdmi);
209 static inline void hdmi_writeb(struct dw_hdmi *hdmi, u8 val, int offset) in hdmi_writeb() argument
[all …]
|
| H A D | dw-hdmi-qp.c | 10 #include <linux/hdmi.h>
29 #include <sound/hdmi-codec.h>
31 #include "dw-hdmi-qp.h"
46 * the recommended N values specified in the Audio chapter of the HDMI
93 /* For 297 MHz+ HDMI spec have some other rule for setting N */
102 * These are the CTS values as recommended in the Audio chapter of the HDMI
150 static void dw_hdmi_qp_write(struct dw_hdmi_qp *hdmi, unsigned int val, in dw_hdmi_qp_write() argument
153 regmap_write(hdmi->regm, offset, val); in dw_hdmi_qp_write()
156 static unsigned int dw_hdmi_qp_read(struct dw_hdmi_qp *hdmi, int offset) in dw_hdmi_qp_read() argument
160 regmap_read(hdmi->regm, offset, &val); in dw_hdmi_qp_read()
[all …]
|
| H A D | dw-hdmi-i2s-audio.c | 3 * dw-hdmi-i2s-audio.c
15 #include <sound/hdmi-codec.h>
17 #include "dw-hdmi.h"
18 #include "dw-hdmi-audio.h"
20 #define DRIVER_NAME "dw-hdmi-i2s-audio"
25 struct dw_hdmi *hdmi = audio->hdmi; in hdmi_write() local
27 audio->write(hdmi, val, offset); in hdmi_write()
32 struct dw_hdmi *hdmi = audio->hdmi; in hdmi_read() local
34 return audio->read(hdmi, offset); in hdmi_read()
42 struct dw_hdmi *hdmi = audio->hdmi; in dw_hdmi_i2s_hw_params() local
[all …]
|
| /linux/drivers/gpu/drm/sun4i/ |
| H A D | sun4i_hdmi_i2c.c | 25 static int fifo_transfer(struct sun4i_hdmi *hdmi, u8 *buf, int len, bool read) in fifo_transfer() argument
41 (hdmi->variant->ddc_fifo_thres_incl ? 0 : 1); in fifo_transfer()
50 if (regmap_field_read_poll_timeout(hdmi->field_ddc_int_status, reg, in fifo_transfer()
59 ioread8_rep(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
61 iowrite8_rep(hdmi->base + hdmi->variant->ddc_fifo_reg, buf, len); in fifo_transfer()
64 regmap_field_force_write(hdmi->field_ddc_int_status, in fifo_transfer()
70 static int xfer_msg(struct sun4i_hdmi *hdmi, struct i2c_msg *msg) in xfer_msg() argument
76 if (hdmi->variant->ddc_fifo_has_dir) { in xfer_msg()
77 reg = readl(hdmi->base + SUN4I_HDMI_DDC_CTRL_REG); in xfer_msg()
82 writel(reg, hdmi->base + SUN4I_HDMI_DDC_CTRL_REG); in xfer_msg()
[all …]
|
| H A D | sun4i_hdmi_enc.c | 47 struct sun4i_hdmi *hdmi = drm_connector_to_sun4i_hdmi(connector); in sun4i_hdmi_write_infoframe() local
57 writeb(buffer[i], hdmi->base + SUN4I_HDMI_AVI_INFOFRAME_REG(i)); in sun4i_hdmi_write_infoframe()
66 struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder); in sun4i_hdmi_disable() local
69 DRM_DEBUG_DRIVER("Disabling the HDMI Output\n"); in sun4i_hdmi_disable()
71 val = readl(hdmi->base + SUN4I_HDMI_VID_CTRL_REG); in sun4i_hdmi_disable()
73 writel(val, hdmi->base + SUN4I_HDMI_VID_CTRL_REG); in sun4i_hdmi_disable()
75 clk_disable_unprepare(hdmi->tmds_clk); in sun4i_hdmi_disable()
82 struct sun4i_hdmi *hdmi = drm_encoder_to_sun4i_hdmi(encoder); in sun4i_hdmi_enable() local
83 struct drm_connector *connector = &hdmi->connector; in sun4i_hdmi_enable()
87 unsigned long long tmds_rate = conn_state->hdmi.tmds_char_rate; in sun4i_hdmi_enable()
[all …]
|
| H A D | sun8i_dw_hdmi.c | 22 struct sun8i_dw_hdmi *hdmi = encoder_to_sun8i_dw_hdmi(encoder); in sun8i_dw_hdmi_encoder_mode_set() local
24 clk_set_rate(hdmi->clk_tmds, mode->crtc_clock * 1000); in sun8i_dw_hdmi_encoder_mode_set()
33 sun8i_dw_hdmi_mode_valid_a83t(struct dw_hdmi *hdmi, void *data, in sun8i_dw_hdmi_mode_valid_a83t() argument
44 sun8i_dw_hdmi_mode_valid_h6(struct dw_hdmi *hdmi, void *data, in sun8i_dw_hdmi_mode_valid_h6() argument
104 struct sun8i_dw_hdmi *hdmi; in sun8i_dw_hdmi_bind() local
110 hdmi = devm_kzalloc(&pdev->dev, sizeof(*hdmi), GFP_KERNEL); in sun8i_dw_hdmi_bind()
111 if (!hdmi) in sun8i_dw_hdmi_bind()
114 plat_data = &hdmi->plat_data; in sun8i_dw_hdmi_bind()
115 hdmi->dev = &pdev->dev; in sun8i_dw_hdmi_bind()
116 encoder = &hdmi->encoder; in sun8i_dw_hdmi_bind()
[all …]
|
| /linux/drivers/gpu/drm/mediatek/ |
| H A D | mtk_hdmi.c | 10 #include <linux/hdmi.h>
24 #include <sound/hdmi-codec.h>
183 static void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, bool black) in mtk_hdmi_hw_vid_black() argument
185 regmap_update_bits(hdmi->regs, VIDEO_CFG_4, in mtk_hdmi_hw_vid_black()
189 static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable) in mtk_hdmi_hw_make_reg_writable() argument
194 * MT8173 HDMI hardware has an output control bit to enable/disable HDMI in mtk_hdmi_hw_make_reg_writable()
196 * The ARM trusted firmware provides an API for the HDMI driver to set in mtk_hdmi_hw_make_reg_writable()
197 * this control bit to enable HDMI output in supervisor mode. in mtk_hdmi_hw_make_reg_writable()
199 if (hdmi->conf && hdmi->conf->tz_disabled) in mtk_hdmi_hw_make_reg_writable()
200 regmap_update_bits(hdmi->sys_regmap, in mtk_hdmi_hw_make_reg_writable()
[all …]
|
| /linux/drivers/gpu/drm/rockchip/ |
| H A D | rk3066_hdmi.c | 68 static inline u8 hdmi_readb(struct rk3066_hdmi *hdmi, u16 offset) in hdmi_readb() argument
70 return readl_relaxed(hdmi->regs + offset); in hdmi_readb()
73 static inline void hdmi_writeb(struct rk3066_hdmi *hdmi, u16 offset, u32 val) in hdmi_writeb() argument
75 writel_relaxed(val, hdmi->regs + offset); in hdmi_writeb()
78 static inline void hdmi_modb(struct rk3066_hdmi *hdmi, u16 offset, in hdmi_modb() argument
81 u8 temp = hdmi_readb(hdmi, offset) & ~msk; in hdmi_modb()
84 hdmi_writeb(hdmi, offset, temp); in hdmi_modb()
87 static void rk3066_hdmi_i2c_init(struct rk3066_hdmi *hdmi) in rk3066_hdmi_i2c_init() argument
91 ddc_bus_freq = (hdmi->tmdsclk >> 2) / HDMI_SCL_RATE; in rk3066_hdmi_i2c_init()
93 hdmi_writeb(hdmi, HDMI_DDC_BUS_FREQ_L, ddc_bus_freq & 0xFF); in rk3066_hdmi_i2c_init()
[all …]
|
| /linux/drivers/gpu/drm/msm/hdmi/ |
| H A D | hdmi_bridge.c | 14 #include "hdmi.h"
20 struct hdmi *hdmi = hdmi_bridge->hdmi; in msm_hdmi_power_on() local
23 pm_runtime_resume_and_get(&hdmi->pdev->dev); in msm_hdmi_power_on()
25 if (hdmi->extp_clk) { in msm_hdmi_power_on()
26 DBG("pixclock: %lu", hdmi->pixclock); in msm_hdmi_power_on()
27 ret = clk_set_rate(hdmi->extp_clk, hdmi->pixclock); in msm_hdmi_power_on()
31 ret = clk_prepare_enable(hdmi->extp_clk); in msm_hdmi_power_on()
40 struct hdmi *hdmi = hdmi_bridge->hdmi; in power_off() local
47 if (hdmi->extp_clk) in power_off()
48 clk_disable_unprepare(hdmi->extp_clk); in power_off()
[all …]
|
| H A D | hdmi_hpd.c | 12 #include "hdmi.h"
14 static void msm_hdmi_phy_reset(struct hdmi *hdmi) in msm_hdmi_phy_reset() argument
18 val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL); in msm_hdmi_phy_reset()
22 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
26 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
32 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
36 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
44 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
48 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
54 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
[all …]
|
| H A D | hdmi_hdcp.c | 5 #include "hdmi.h"
21 /* QFPROM Registers for HDMI/HDCP */
49 struct hdmi *hdmi; member
78 static int msm_hdmi_ddc_read(struct hdmi *hdmi, u16 addr, u8 offset, in msm_hdmi_ddc_read() argument
99 rc = i2c_transfer(hdmi->i2c, msgs, 2); in msm_hdmi_ddc_read()
116 static int msm_hdmi_ddc_write(struct hdmi *hdmi, u16 addr, u8 offset, in msm_hdmi_ddc_write() argument
141 rc = i2c_transfer(hdmi->i2c, msgs, 1); in msm_hdmi_ddc_write()
159 struct hdmi *hdmi = hdcp_ctrl->hdmi; in msm_hdmi_hdcp_scm_wr() local
167 phy_addr = (u32)hdmi->mmio_phy_addr; in msm_hdmi_hdcp_scm_wr()
190 hdmi_write(hdmi, preg[i], pdata[i]); in msm_hdmi_hdcp_scm_wr()
[all …]
|
| H A D | hdmi_audio.c | 10 #include <linux/hdmi.h>
12 #include <sound/hdmi-codec.h>
14 #include "hdmi.h"
16 int msm_hdmi_audio_update(struct hdmi *hdmi) in msm_hdmi_audio_update() argument
18 struct hdmi_audio *audio = &hdmi->audio; in msm_hdmi_audio_update()
23 if (!hdmi->connector->display_info.is_hdmi) in msm_hdmi_audio_update()
29 DBG("video: power_on=%d, pixclock=%lu", hdmi->power_on, hdmi->pixclock); in msm_hdmi_audio_update()
31 if (enabled && !(hdmi->power_on && hdmi->pixclock)) { in msm_hdmi_audio_update()
37 acr_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_ACR_PKT_CTRL); in msm_hdmi_audio_update()
38 vbi_pkt_ctrl = hdmi_read(hdmi, REG_HDMI_VBI_PKT_CTRL); in msm_hdmi_audio_update()
[all …]
|
| H A D | hdmi.h | 15 #include <linux/hdmi.h>
20 #include "hdmi.xml.h"
33 struct hdmi { struct
67 /* the encoder we are hooked to (outside of hdmi block) */ argument
98 struct hdmi *hdmi; argument
103 void msm_hdmi_set_mode(struct hdmi *hdmi, bool power_on);
105 static inline void hdmi_write(struct hdmi *hdmi, u32 reg, u32 data) in hdmi_write() argument
107 writel(data, hdmi->mmio + reg); in hdmi_write()
110 static inline u32 hdmi_read(struct hdmi *hdmi, u32 reg) in hdmi_read() argument
112 return readl(hdmi->mmio + reg); in hdmi_read()
[all …]
|
| /linux/sound/hda/codecs/hdmi/ |
| H A D | nvhdmi.c | 3 * Nvidia HDMI codec support
145 HDA_CODEC_ID_MODEL(0x10de0008, "GPU 08 HDMI/DP", MODEL_LEGACY),
146 HDA_CODEC_ID_MODEL(0x10de0009, "GPU 09 HDMI/DP", MODEL_LEGACY),
147 HDA_CODEC_ID_MODEL(0x10de000a, "GPU 0a HDMI/DP", MODEL_LEGACY),
148 HDA_CODEC_ID_MODEL(0x10de000b, "GPU 0b HDMI/DP", MODEL_LEGACY),
149 HDA_CODEC_ID_MODEL(0x10de000c, "MCP89 HDMI", MODEL_LEGACY),
150 HDA_CODEC_ID_MODEL(0x10de000d, "GPU 0d HDMI/DP", MODEL_LEGACY),
151 HDA_CODEC_ID_MODEL(0x10de0010, "GPU 10 HDMI/DP", MODEL_LEGACY),
152 HDA_CODEC_ID_MODEL(0x10de0011, "GPU 11 HDMI/DP", MODEL_LEGACY),
153 HDA_CODEC_ID_MODEL(0x10de0012, "GPU 12 HDMI/DP", MODEL_LEGACY),
[all …]
|
| H A D | Kconfig | 4 tristate "HD-audio HDMI codec support"
6 Say Y or M here to include HD-audio HDMI/DislayPort codec support.
8 This will enable all HDMI/DP codec drivers as default, but you can
15 tristate "Generic HDMI/DisplayPort HD-audio codec support" if EXPERT
20 Say Y or M here to include Generic HDMI and DisplayPort HD-audio
27 tristate "Simple HDMI/DisplayPort HD-audio codec support" if EXPERT
30 Say Y or M here to include Simple HDMI and DisplayPort HD-audio
34 tristate "Intel HDMI/DisplayPort HD-audio codec support" if EXPERT
38 Say Y or M here to include Intel graphics HDMI and DisplayPort
42 bool "Enable Silent Stream always for HDMI"
[all …]
|
| /linux/drivers/video/fbdev/omap2/omapfb/dss/ |
| H A D | hdmi5.c | 3 * HDMI driver for OMAP5
14 #define DSS_SUBSYS_NAME "HDMI"
32 #include <sound/omap-hdmi-audio.h>
38 static struct omap_hdmi hdmi; variable
46 r = pm_runtime_resume_and_get(&hdmi.pdev->dev); in hdmi_runtime_get()
59 r = pm_runtime_put_sync(&hdmi.pdev->dev); in hdmi_runtime_put()
88 v = hdmi_read_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL); in hdmi_irq_handler()
91 hdmi_write_reg(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, v); in hdmi_irq_handler()
98 REG_FLD_MOD(hdmi.phy.base, HDMI_TXPHY_PAD_CFG_CTRL, 0, 15, 15); in hdmi_irq_handler()
113 if (hdmi.vdda_reg != NULL) in hdmi_init_regulator()
[all …]
|
| H A D | hdmi4.c | 3 * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
9 #define DSS_SUBSYS_NAME "HDMI"
27 #include <sound/omap-hdmi-audio.h>
32 #include "hdmi.h"
34 static struct omap_hdmi hdmi; variable
42 r = pm_runtime_resume_and_get(&hdmi.pdev->dev); in hdmi_runtime_get()
55 r = pm_runtime_put_sync(&hdmi.pdev->dev); in hdmi_runtime_put()
94 if (hdmi.vdda_reg != NULL) in hdmi_init_regulator()
97 reg = devm_regulator_get(&hdmi.pdev->dev, "vdda"); in hdmi_init_regulator()
105 hdmi.vdda_reg = reg; in hdmi_init_regulator()
[all …]
|
| /linux/Documentation/devicetree/bindings/display/samsung/ |
| H A D | samsung,exynos-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
7 title: Samsung Exynos SoC HDMI
18 - samsung,exynos4210-hdmi
19 - samsung,exynos4212-hdmi
20 - samsung,exynos5420-hdmi
21 - samsung,exynos5433-hdmi
34 Phandle to the HDMI DDC node.
36 hdmi-en-supply:
38 Provides voltage source for DCC lines available on HDMI connector. When
40 HPD (hot plug detect) line, what causes HDMI block to stay turned off.
[all …]
|
| /linux/drivers/gpu/drm/imx/ipuv3/ |
| H A D | dw_hdmi-imx.c | 4 * derived from imx-hdmi.c(renamed to bridge/dw_hdmi.c now)
31 struct imx_hdmi *hdmi; member
37 struct dw_hdmi *hdmi; member
43 return container_of(e, struct imx_hdmi_encoder, encoder)->hdmi; in enc_to_imx_hdmi()
112 struct imx_hdmi *hdmi = enc_to_imx_hdmi(encoder); in dw_hdmi_imx_encoder_enable() local
113 int mux = drm_of_encoder_active_port_id(hdmi->dev->of_node, encoder); in dw_hdmi_imx_encoder_enable()
115 regmap_update_bits(hdmi->regmap, IOMUXC_GPR3, in dw_hdmi_imx_encoder_enable()
139 imx6q_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, in imx6q_hdmi_mode_valid() argument
153 imx6dl_hdmi_mode_valid(struct dw_hdmi *hdmi, void *data, in imx6dl_hdmi_mode_valid() argument
181 { .compatible = "fsl,imx6q-hdmi",
[all …]
|
| /linux/drivers/gpu/drm/bridge/imx/ |
| H A D | imx8mp-hdmi-tx.c | 25 struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data; in imx8mp_hdmi_mode_valid() local
34 round_rate = clk_round_rate(hdmi->pixclk, mode->clock * 1000); in imx8mp_hdmi_mode_valid()
35 /* imx8mp's pixel clock generator (fsl-samsung-hdmi) cannot generate in imx8mp_hdmi_mode_valid()
63 static void im8mp_hdmi_phy_setup_hpd(struct dw_hdmi *hdmi, void *data) in im8mp_hdmi_phy_setup_hpd() argument
69 dw_hdmi_phy_gen1_reset(hdmi); in im8mp_hdmi_phy_setup_hpd()
71 dw_hdmi_phy_setup_hpd(hdmi, data); in im8mp_hdmi_phy_setup_hpd()
86 struct imx8mp_hdmi *hdmi; in imx8mp_dw_hdmi_probe() local
88 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL); in imx8mp_dw_hdmi_probe()
89 if (!hdmi) in imx8mp_dw_hdmi_probe()
92 plat_data = &hdmi->plat_data; in imx8mp_dw_hdmi_probe()
[all …]
|
| /linux/Documentation/devicetree/bindings/display/bridge/ |
| H A D | renesas,dw-hdmi.yaml | 4 $id: http://devicetree.org/schemas/display/bridge/renesas,dw-hdmi.yaml#
7 title: Renesas R-Car DWC HDMI TX Encoder
13 The HDMI transmitter is a Synopsys DesignWare HDMI 1.4 TX controller IP
17 - $ref: synopsys,dw-hdmi.yaml#
23 - renesas,r8a774a1-hdmi # for RZ/G2M compatible HDMI TX
24 - renesas,r8a774b1-hdmi # for RZ/G2N compatible HDMI TX
25 - renesas,r8a774e1-hdmi # for RZ/G2H compatible HDMI TX
26 - renesas,r8a7795-hdmi # for R-Car H3 compatible HDMI TX
27 - renesas,r8a7796-hdmi # for R-Car M3-W compatible HDMI TX
28 - renesas,r8a77961-hdmi # for R-Car M3-W+ compatible HDMI TX
[all …]
|
| /linux/sound/soc/mediatek/mt8183/ |
| H A D | mt8183-dai-tdm.c | 347 {"HDMI_CH0_MUX", "CH0", "HDMI"},
348 {"HDMI_CH0_MUX", "CH1", "HDMI"},
349 {"HDMI_CH0_MUX", "CH2", "HDMI"},
350 {"HDMI_CH0_MUX", "CH3", "HDMI"},
351 {"HDMI_CH0_MUX", "CH4", "HDMI"},
352 {"HDMI_CH0_MUX", "CH5", "HDMI"},
353 {"HDMI_CH0_MUX", "CH6", "HDMI"},
354 {"HDMI_CH0_MUX", "CH7", "HDMI"},
356 {"HDMI_CH1_MUX", "CH0", "HDMI"},
357 {"HDMI_CH1_MUX", "CH1", "HDMI"},
[all …]
|
| /linux/drivers/gpu/drm/sti/ |
| H A D | sti_hdmi_tx3g4c28phy.c | 70 * sti_hdmi_tx3g4c28phy_start - Start hdmi phy macro cell tx3g4c28
72 * @hdmi: pointer on the hdmi internal structure
76 static bool sti_hdmi_tx3g4c28phy_start(struct sti_hdmi *hdmi) in sti_hdmi_tx3g4c28phy_start() argument
78 u32 ckpxpll = hdmi->mode.clock * 1000; in sti_hdmi_tx3g4c28phy_start()
116 hdmi->event_received = false; in sti_hdmi_tx3g4c28phy_start()
118 hdmi_write(hdmi, (pllctrl | PLL_CFG_EN), HDMI_SRZ_PLL_CFG); in sti_hdmi_tx3g4c28phy_start()
121 wait_event_interruptible_timeout(hdmi->wait_event, in sti_hdmi_tx3g4c28phy_start()
122 hdmi->event_received == true, in sti_hdmi_tx3g4c28phy_start()
126 if ((hdmi_read(hdmi, HDMI_STA) & HDMI_STA_DLL_LCK) == 0) { in sti_hdmi_tx3g4c28phy_start()
127 DRM_ERROR("hdmi phy pll not locked\n"); in sti_hdmi_tx3g4c28phy_start()
[all …]
|
| /linux/sound/soc/mediatek/mt8192/ |
| H A D | mt8192-dai-tdm.c | 395 {"HDMI_CH0_MUX", "CH0", "HDMI"},
396 {"HDMI_CH0_MUX", "CH1", "HDMI"},
397 {"HDMI_CH0_MUX", "CH2", "HDMI"},
398 {"HDMI_CH0_MUX", "CH3", "HDMI"},
399 {"HDMI_CH0_MUX", "CH4", "HDMI"},
400 {"HDMI_CH0_MUX", "CH5", "HDMI"},
401 {"HDMI_CH0_MUX", "CH6", "HDMI"},
402 {"HDMI_CH0_MUX", "CH7", "HDMI"},
404 {"HDMI_CH1_MUX", "CH0", "HDMI"},
405 {"HDMI_CH1_MUX", "CH1", "HDMI"},
[all …]
|
| /linux/sound/pci/oxygen/ |
| H A D | xonar_hdmi.c | 3 * helper functions for HDMI models (Xonar HDAV1.3/HDAV1.3 Slim)
37 struct xonar_hdmi *hdmi) in xonar_hdmi_init_commands() argument
46 hdmi_write_command(chip, 0x54, 5, hdmi->params); in xonar_hdmi_init_commands()
49 void xonar_hdmi_init(struct oxygen *chip, struct xonar_hdmi *hdmi) in xonar_hdmi_init() argument
51 hdmi->params[1] = IEC958_AES3_CON_FS_48000; in xonar_hdmi_init()
52 hdmi->params[4] = 1; in xonar_hdmi_init()
53 xonar_hdmi_init_commands(chip, hdmi); in xonar_hdmi_init()
63 void xonar_hdmi_resume(struct oxygen *chip, struct xonar_hdmi *hdmi) in xonar_hdmi_resume() argument
65 xonar_hdmi_init_commands(chip, hdmi); in xonar_hdmi_resume()
80 void xonar_set_hdmi_params(struct oxygen *chip, struct xonar_hdmi *hdmi, in xonar_set_hdmi_params() argument
[all …]
|