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/linux/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * DesignWare High-Definition Multimedia Interface (HDMI) driver
5 * Copyright (C) 2013-2015 Mentor Graphics Inc.
6 * Copyright (C) 2011-2013 Freescale Semiconductor, Inc.
13 #include <linux/hdmi.h>
21 #include <linux/dma-mapping.h>
24 #include <media/cec-notifier.h>
26 #include <linux/media-bus-format.h>
40 #include "dw-hdmi-audio.h"
41 #include "dw-hdmi-cec.h"
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H A Ddw-hdmi-qp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2021-2022 Rockchip Electronics Co., Ltd.
6 * Author: Algea Cao <algea.cao@rock-chips.com>
10 #include <linux/hdmi.h>
29 #include <sound/hdmi-codec.h>
31 #include "dw-hdmi-qp.h"
41 * Unless otherwise noted, entries in this table are 100% optimization.
43 * slow so we pre-compute values we expect to see.
46 * the recommended N values specified in the Audio chapter of the HDMI
93 /* For 297 MHz+ HDMI spec have some other rule for setting N */
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/linux/Documentation/userspace-api/media/v4l/
H A Dext-ctrls-dv.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _dv-controls:
12 (Digital Visual Interface), HDMI (:ref:`hdmi`) and DisplayPort
15 only exposed on the ``/dev/v4l-subdev*`` device node.
20 hooked up to e.g. HDMI connectors. Even though the subdevice will
23 Identification Data, :ref:`vesaedid`) and HDCP (High-bandwidth Digital
25 device to do the fairly slow EDID/HDCP handling in advance. This allows
28 These pads appear in several of the controls in this section as
33 .. _dv-control-id:
47 read-only control is applicable to DVI-D, HDMI and DisplayPort
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/linux/drivers/video/fbdev/omap2/omapfb/displays/
H A Dconnector-hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * HDMI Connector driver
39 struct omap_dss_device *in; member
53 struct omap_dss_device *in = ddata->in; in hdmic_connect() local
55 dev_dbg(ddata->dev, "connect\n"); in hdmic_connect()
60 return in->ops.hdmi->connect(in, dssdev); in hdmic_connect()
66 struct omap_dss_device *in = ddata->in; in hdmic_disconnect() local
68 dev_dbg(ddata->dev, "disconnect\n"); in hdmic_disconnect()
73 in->ops.hdmi->disconnect(in, dssdev); in hdmic_disconnect()
79 struct omap_dss_device *in = ddata->in; in hdmic_enable() local
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H A Dencoder-tpd12s015.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * TPD12S015 HDMI ESD protection & level shifter chip driver
21 struct omap_dss_device *in; member
36 struct omap_dss_device *in = ddata->in; in tpd_connect() local
39 r = in->ops.hdmi->connect(in, dssdev); in tpd_connect()
43 dst->src = dssdev; in tpd_connect()
44 dssdev->dst = dst; in tpd_connect()
46 if (ddata->ct_cp_hpd_gpio) { in tpd_connect()
47 gpiod_set_value_cansleep(ddata->ct_cp_hpd_gpio, 1); in tpd_connect()
48 /* DC-DC converter needs at max 300us to get to 90% of 5V */ in tpd_connect()
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/linux/sound/hda/codecs/hdmi/
H A Dtegrahdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Nvidia Tegra HDMI codec support
23 * accessed using vendor-defined verbs. These registers can be used for
24 * interoperability between the HDA and HDMI drivers.
31 * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
33 * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
34 * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
38 * +---------+-------+--------+--------+
40 * +-----------------------------------|
45 * trigger to hdmi.
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H A Dintelhdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Intel HDMI codec support
19 MODULE_PARM_DESC(enable_silent_stream, "Enable Silent Stream for HDMI devices");
40 struct hdmi_spec *spec = codec->spec; in intel_haswell_enable_all_pins()
42 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0, in intel_haswell_enable_all_pins()
44 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS) in intel_haswell_enable_all_pins()
48 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0, in intel_haswell_enable_all_pins()
50 if (vendor_param == -1) in intel_haswell_enable_all_pins()
60 struct hdmi_spec *spec = codec->spec; in intel_haswell_fixup_enable_dp12()
62 vendor_param = snd_hda_codec_read(codec, spec->vendor_nid, 0, in intel_haswell_fixup_enable_dp12()
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/linux/Documentation/userspace-api/media/cec/
H A Dcec-intro.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _cec-intro:
8 HDMI connectors provide a single pin for use by the Consumer Electronics
10 HDMI cable to communicate. The protocol for CEC version 1.4 is defined
11 in supplements 1 (CEC) and 2 (HEAC or HDMI Ethernet and Audio Return
12 Channel) of the HDMI 1.4a (:ref:`hdmi`) specification and the
13 extensions added to CEC version 2.0 are defined in chapter 11 of the
14 HDMI 2.0 (:ref:`hdmi2`) specification.
17 and is based on the ancient AV.link protocol used in old SCART
24 In addition, CEC can be implemented in HDMI receivers, transmitters and
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/linux/Documentation/devicetree/bindings/sound/
H A Dimx-audio-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/imx-audio-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX audio complex with HDMI
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
15 - fsl,imx-audio-hdmi
16 - fsl,imx-audio-sii902x
22 audio-cpu:
26 hdmi-out:
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/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_hdcp.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2010-2015, The Linux Foundation. All rights reserved.
5 #include "hdmi.h"
21 /* QFPROM Registers for HDMI/HDCP */
49 struct hdmi *hdmi; member
78 static int msm_hdmi_ddc_read(struct hdmi *hdmi, u16 addr, u8 offset, in msm_hdmi_ddc_read() argument
99 rc = i2c_transfer(hdmi->i2c, msgs, 2); in msm_hdmi_ddc_read()
101 retry--; in msm_hdmi_ddc_read()
107 rc = -EIO; in msm_hdmi_ddc_read()
116 static int msm_hdmi_ddc_write(struct hdmi *hdmi, u16 addr, u8 offset, in msm_hdmi_ddc_write() argument
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H A Dhdmi_hpd.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include "hdmi.h"
14 static void msm_hdmi_phy_reset(struct hdmi *hdmi) in msm_hdmi_phy_reset() argument
18 val = hdmi_read(hdmi, REG_HDMI_PHY_CTRL); in msm_hdmi_phy_reset()
22 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
26 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
32 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
36 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
44 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
48 hdmi_write(hdmi, REG_HDMI_PHY_CTRL, in msm_hdmi_phy_reset()
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/arm-smccc.h>
10 #include <linux/hdmi.h>
24 #include <sound/hdmi-codec.h>
183 static void mtk_hdmi_hw_vid_black(struct mtk_hdmi *hdmi, bool black) in mtk_hdmi_hw_vid_black() argument
185 regmap_update_bits(hdmi->regs, VIDEO_CFG_4, in mtk_hdmi_hw_vid_black()
189 static void mtk_hdmi_hw_make_reg_writable(struct mtk_hdmi *hdmi, bool enable) in mtk_hdmi_hw_make_reg_writable() argument
194 * MT8173 HDMI hardware has an output control bit to enable/disable HDMI in mtk_hdmi_hw_make_reg_writable()
195 * output. This bit can only be controlled in ARM supervisor mode. in mtk_hdmi_hw_make_reg_writable()
196 * The ARM trusted firmware provides an API for the HDMI driver to set in mtk_hdmi_hw_make_reg_writable()
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/linux/sound/soc/codecs/
H A Dhdac_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * hdac_hdmi.c - ASoc HDA-HDMI codec driver for Intel platforms
5 * Copyright (C) 2014-2015 Intel Corp
17 #include <linux/hdmi.h>
107 unsigned char chmap[8]; /* ALSA API channel-map */
140 #define hdev_to_hdmi_priv(_hdev) dev_get_drvdata(&(_hdev)->dev)
143 hdac_hdmi_get_pcm_from_cvt(struct hdac_hdmi_priv *hdmi, in hdac_hdmi_get_pcm_from_cvt() argument
148 list_for_each_entry(pcm, &hdmi->pcm_list, head) { in hdac_hdmi_get_pcm_from_cvt()
149 if (pcm->cvt == cvt) in hdac_hdmi_get_pcm_from_cvt()
159 struct hdac_device *hdev = port->pin->hdev; in hdac_hdmi_jack_report()
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/linux/sound/soc/meson/
H A Daiu-codec-ctrl.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <sound/soc-dai.h>
11 #include <dt-bindings/sound/meson-aiu.h>
13 #include "meson-codec-glue.h"
30 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in aiu_codec_ctrl_mux_put_enum()
33 mux = snd_soc_enum_item_to_val(e, ucontrol->value.enumerated.item[0]); in aiu_codec_ctrl_mux_put_enum()
34 changed = snd_soc_component_test_bits(component, e->reg, in aiu_codec_ctrl_mux_put_enum()
45 snd_soc_component_update_bits(component, e->reg, in aiu_codec_ctrl_mux_put_enum()
52 snd_soc_component_update_bits(component, e->reg, in aiu_codec_ctrl_mux_put_enum()
68 SOC_DAPM_ENUM_EXT("HDMI Source", aiu_hdmi_ctrl_mux_enum,
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/linux/Documentation/devicetree/bindings/display/
H A Dbrcm,bcm2711-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM2711 HDMI Controller
10 - Eric Anholt <eric@anholt.net>
15 - brcm,bcm2711-hdmi0
16 - brcm,bcm2711-hdmi1
17 - brcm,bcm2712-hdmi0
18 - brcm,bcm2712-hdmi1
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/linux/Documentation/admin-guide/media/
H A Dvivid.rst1 .. SPDX-License-Identifier: GPL-2.0
8 transmitters, touch capture and a software defined radio receiver. In addition a
13 Each input can be a webcam, TV capture device, S-Video capture device or an HDMI
14 capture device. Each output can be an S-Video output device or an HDMI output
23 - Support for read()/write(), MMAP, USERPTR and DMABUF streaming I/O.
24 - A large list of test patterns and variations thereof
25 - Working brightness, contrast, saturation and hue controls
26 - Support for the alpha color component
27 - Full colorspace support, including limited/full RGB range
28 - All possible control types are present
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/linux/Documentation/devicetree/bindings/display/ti/
H A Dti,omap-dss.txt5 -------------------
8 Binding details for each OMAP SoC version are described in respective binding
22 HDMI, MIPI DPI, etc.
25 -----------
28 video ports is described in Documentation/devicetree/bindings/graph.txt,
30 described in the SoC's DSS binding documentation.
36 -------
39 name for each display. If no aliases are defined, a semi-random number is used
43 -------
45 A shortened example of the DSS description for OMAP4, with non-relevant parts
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/linux/drivers/gpu/drm/meson/
H A Dmeson_dw_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
32 #define DRIVER_NAME "meson-dw-hdmi"
33 #define DRIVER_DESC "Amlogic Meson HDMI-TX DRM driver"
36 * DOC: HDMI Output
38 * HDMI Output is composed of :
40 * - A Synopsys DesignWare HDMI Controller IP
41 * - A TOP control block controlling the Clocks and PHY
42 * - A custom HDMI PHY in order convert video to TMDS signal
47 * | HDMI TOP |<= HPD
50 * | Synopsys HDMI | HDMI PHY |=> TMDS
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/linux/Documentation/devicetree/bindings/display/bridge/
H A Dsynopsys,dw-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/bridge/synopsys,dw-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Common Properties for Synopsys DesignWare HDMI TX Controller
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 This document defines device tree properties for the Synopsys DesignWare HDMI
14 TX controller (DWC HDMI TX) IP core. It doesn't constitute a full device tree
16 bindings for the platform-specific integrations of the DWC HDMI TX.
18 When referenced from platform device tree bindings the properties defined in
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/linux/sound/soc/intel/boards/
H A Dsof_ssp_amp.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * sof_ssp_amp.c - ASoc Machine driver for Intel platforms
24 /* Driver-specific board quirks: from bit 0 to 7 */
52 /* BE ID defined in sof-tgl-rt1308-hdmi-ssp.m4 */
57 /* extra BE links to support no-hdmi-in boards */
87 if (ctx->amp_type == CODEC_NONE) in sof_card_dai_links_create()
90 if (!ctx->amp_link) { in sof_card_dai_links_create()
92 return -EINVAL; in sof_card_dai_links_create()
95 /* codec-specific fields for speaker amplifier */ in sof_card_dai_links_create()
96 switch (ctx->amp_type) { in sof_card_dai_links_create()
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/linux/Documentation/devicetree/bindings/phy/
H A Damlogic,meson8-hdmi-tx-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/amlogic,meson8-hdmi-tx-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Meson8, Meson8b and Meson8m2 HDMI TX PHY
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
13 The HDMI TX PHY node should be the child of a syscon node with the
16 compatible = "amlogic,meson-hhi-sysctrl", "simple-mfd", "syscon"
18 Refer to the bindings described in
23 pattern: "^hdmi-phy@[0-9a-f]+$"
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/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77970-eagle-function-expansion.dtso1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
17 cvbs-in-cn4 {
18 compatible = "composite-video-connector";
19 label = "CVBS IN CN4";
23 remote-endpoint = <&adv7482_ain7>;
30 hdmi-in-cn2 {
31 compatible = "hdmi-connector";
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/linux/drivers/gpu/drm/bridge/imx/
H A Dimx8mp-hdmi-tx.c1 // SPDX-License-Identifier: GPL-2.0+
25 struct imx8mp_hdmi *hdmi = (struct imx8mp_hdmi *)data; in imx8mp_hdmi_mode_valid() local
28 if (mode->clock < 13500) in imx8mp_hdmi_mode_valid()
31 if (mode->clock > 297000) in imx8mp_hdmi_mode_valid()
34 round_rate = clk_round_rate(hdmi->pixclk, mode->clock * 1000); in imx8mp_hdmi_mode_valid()
35 /* imx8mp's pixel clock generator (fsl-samsung-hdmi) cannot generate in imx8mp_hdmi_mode_valid()
38 * Allow 0.5% difference allowed in various standards (VESA, CEA861) in imx8mp_hdmi_mode_valid()
39 * 0.5% = 5/1000 tolerance (mode->clock is 1/1000) in imx8mp_hdmi_mode_valid()
41 if (abs(round_rate - mode->clock * 1000) > mode->clock * 5) in imx8mp_hdmi_mode_valid()
44 /* We don't support double-clocked and Interlaced modes */ in imx8mp_hdmi_mode_valid()
[all …]
/linux/drivers/gpu/drm/loongson/
H A Dlsdc_output_7a2000.c1 // SPDX-License-Identifier: GPL-2.0+
17 * The display controller in LS7A2000 has two display pipes
18 * Display pipe 0 is attached with a built-in transparent VGA encoder and
19 * a built-in HDMI encoder.
20 * Display pipe 1 has only one built-in HDMI encoder connected.
22 * | +-----+ | | |
23 * | CRTC0 -+--> | VGA | ----> VGA Connector ---> | VGA Monitor |<---+
24 * | | +-----+ | |_____________| |
26 * | | +------+ | | | |
27 * | +--> | HDMI | ----> HDMI Connector --> | HDMI Monitor |<--+
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/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos-hdmi.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC HDMI
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - samsung,exynos4210-hdmi
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