| /freebsd/sys/contrib/device-tree/Bindings/crypto/ |
| H A D | img-hash.txt | 1 Imagination Technologies hardware hash accelerator
3 The hash accelerator provides hardware hashing acceleration for
8 - compatible : "img,hash-accelerator"
9 - reg : Offset and length of the register set for the module, and the DMA port
10 - interrupts : The designated IRQ line for the hashing module.
11 - dmas : DMA specifier as per Documentation/devicetree/bindings/dma/dma.txt
12 - dma-names : Should be "tx"
13 - clocks : Clock specifiers
14 - clock-names : "sys" Used to clock the hash block registers
15 "hash" Used to clock data through the accelerator
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| H A D | img,hash-accelerator.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/img,hash-accelerator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Imagination Technologies hardware hash accelerator
10 - James Hartley <james.hartley@imgtec.com>
13 The hash accelerator provides hardware hashing acceleration for
18 const: img,hash-accelerator
22 - description: Register base address and size
23 - description: DMA port specifier
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| H A D | aspeed,ast2500-hace.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/crypto/aspeed,ast2500-hace.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED HACE hash and crypto Hardware Accelerator Engines
10 - Neal Liu <neal_liu@aspeedtech.com>
13 The Hash and Crypto Engine (HACE) is designed to accelerate the throughput
14 of hash data digest, encryption, and decryption. Basically, HACE can be
15 divided into two independently engines - Hash Engine and Crypto Engine.
20 - aspeed,ast2500-hace
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| H A D | fsl,sec-v4.0.yaml | 1 # SPDX-License-Identifier: GPL-2.0
2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.
4 ---
5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - '"Horia Geantă" <horia.geanta@nxp.com>'
12 - Pankaj Gupta <pankaj.gupta@nxp.com>
13 - Gaurav Jain <gaurav.jain@nxp.com>
16 NOTE: the SEC 4 is also known as Freescale's Cryptographic Accelerator
17 Accelerator and Assurance Module (CAAM).
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| H A D | atmel,at91sam9g46-sha.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/crypto/atmel,at91sam9g46-sha.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Atmel Secure Hash Algorithm (SHA) HW cryptographic accelerator
11 - Tudor Ambarus <tudor.ambarus@linaro.org>
16 - const: atmel,at91sam9g46-sha
17 - items:
18 - enum:
19 - microchip,sam9x7-sha
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | AccelTable.h | 1 //==- include/llvm/CodeGen/AccelTable.h - Accelerator Tables -----*- C++ -*-==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 /// This file contains support for writing accelerator tables.
11 //===----------------------------------------------------------------------===//
31 /// The DWARF and Apple accelerator tables are an indirect hash table optimized
32 /// for null lookup rather than access to known data. The Apple accelerator
33 /// tables are a precursor of the newer DWARF v5 accelerator tables. Both
36 /// The Apple accelerator table are output into an on-disk format that looks
39 /// .------------------.
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| /freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/ |
| H A D | DWARFAcceleratorTable.h | 1 //===- DWARFAcceleratorTable.h ----------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
26 /// The accelerator tables are designed to allow efficient random access
29 /// DWARF 5 accelerator tables.
38 /// An abstract class representing a single entry in the accelerator tables.
55 /// Accelerator Entry or std::nullopt if the Compilation Unit offset is not
56 /// recorded in this Accelerator Entry.
60 /// Accelerator Entry or std::nullopt if the Type Unit offset is not
61 /// recorded in this Accelerator Entry.
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| H A D | DWARFVerifier.h | 1 //===- DWARFVerifier.h ----------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
112 /// --No abbreviation declaration has more than one attributes with the same
124 /// - Unit is in 32-bit DWARF format. The function can be modified to
125 /// support 64-bit format.
126 /// - The DWARF version is valid
127 /// - The unit type is valid (if unit is in version >=5)
128 /// - The unit doesn't extend beyond the containing section
129 /// - The address size is valid
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| H A D | DWARFContext.h | 1 //===- DWARFContext.h -------------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===/
52 /// to be protected in multi-threaded environments. Threading support can be
55 /// multi-threaded environment, or not enabled to allow for maximum
150 return DICtx->getKind() == CK_DWARF; in classof()
170 DWARFUnitVector &NormalUnits = State->getNormalUnits(); in info_section_units()
177 return State->getNormalUnits(); in getNormalUnitsVector()
182 DWARFUnitVector &NormalUnits = State->getNormalUnits(); in types_section_units()
197 DWARFUnitVector &NormalUnits = State->getNormalUnits(); in normal_units()
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| /freebsd/sys/contrib/device-tree/Bindings/dma/ |
| H A D | ste-dma40.txt | 4 - compatible: "stericsson,dma40"
5 - reg: Address range of the DMAC registers
6 - reg-names: Names of the above areas to use during resource look-up
7 - interrupt: Should contain the DMAC interrupt number
8 - #dma-cells: must be <3>
9 - memcpy-channels: Channels to be used for memcpy
12 - dma-channels: Number of channels supported by hardware - if not present
14 - disabled-channels: Channels which can not be used
18 dma: dma-controller@801c0000 {
19 compatible = "stericsson,db8500-dma40", "stericsson,dma40";
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| H A D | stericsson,dma40.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ST-Ericsso
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/ |
| H A D | AccelTable.cpp | 1 //===- llvm/CodeGen/AsmPrinter/AccelTable.cpp - Accelerator Tables --------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains support for writing accelerator tables.
11 //===----------------------------------------------------------------------===//
40 UniqueHashCount = llvm::unique(Uniques) - Uniques.begin(); in computeBucketCount()
45 // Create the individual hash data outputs. in finalize()
66 E.second.Sym = Asm->createTempSymbol(Prefix); in finalize()
69 // Sort the contents of the buckets by hash value so that hash collisions end in finalize()
73 return LHS->HashValue < RHS->HashValue; in finalize()
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| /freebsd/contrib/llvm-project/llvm/lib/DWARFLinker/Parallel/ |
| H A D | DWARFLinkerUnit.h | 1 //===- DWARFLinkerUnit.h ----------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
58 /// Returns true if unit is inter-connected(it references/referenced by other
62 /// Mark this unit as inter-connected(it references/referenced by other unit).
81 UnitSize = getDebugInfoHeaderSize() + OutUnitDIE->getSize(); in setOutUnitDIE()
82 UnitTag = OutUnitDIE->getTag(); in setOutUnitDIE()
114 /// \defgroup Methods and data members used for building accelerator tables:
120 /// This structure keeps fields which would be used for creating accelerator
134 /// Hash of the fully qualified name.
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| H A D | DWARFLinkerImpl.cpp | 1 //=== DWARFLinkerImpl.cpp -------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
38 if (!File.Dwarf->compile_units().empty()) in LinkContext()
39 CompileUnits.reserve(File.Dwarf->getNumCompileUnits()); in LinkContext()
42 Format.Version = File.Dwarf->getMaxVersion(); in LinkContext()
43 Format.AddrSize = File.Dwarf->getCUAddrSize(); in LinkContext()
44 Endianness = File.Dwarf->isLittleEndian() ? llvm::endianness::little in LinkContext()
67 if (ObjectContexts.back()->InputDWARFFile.Dwarf) { in addObjectFile()
69 ObjectContexts.back()->InputDWARFFile.Dwarf->compile_units()) { in addObjectFile()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | DJB.h | 1 //===-- llvm/Support/DJB.h ---DJB Hash --------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This file contains support for the DJ Bernstein hash function.
11 //===----------------------------------------------------------------------===//
20 /// The Bernstein hash function used by the DWARF accelerator tables.
27 /// Computes the Bernstein hash after folding the input according to the Dwarf 5
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| /freebsd/contrib/llvm-project/llvm/include/llvm/DWARFLinker/ |
| H A D | DWARFLinkerCompileUnit.h | |
| H A D | DWARFLinker.h | |
| /freebsd/contrib/llvm-project/llvm/include/llvm/DWARFLinker/Classic/ |
| H A D | DWARFLinkerCompileUnit.h | 1 //===- DWARFLinkerCompileUnit.h ---------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
54 return I->getDIEInteger().getValue(); in get()
180 /// reconstructed accelerator tables.
191 /// \p Ctxt if it is non-null.
213 /// Add a name accelerator entry for \a Die with \a Name.
216 /// Add a name accelerator entry for \a Die with \a Name.
220 /// Add various accelerator entries for \p Die with \p Name which is stored
221 /// in the string table at \p Offset. \p Name must be an Objective-C
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| /freebsd/contrib/llvm-project/lldb/source/Plugins/SymbolFile/DWARF/ |
| H A D | DWARFDebugInfo.cpp | 1 //===-- DWARFDebugInfo.cpp ------------------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
46 m_cu_aranges_up->extract(debug_aranges_data); in GetCompileUnitAranges()
50 for (size_t n = 0; n < m_cu_aranges_up->GetNumRanges(); n++) { in GetCompileUnitAranges()
51 dw_offset_t offset = m_cu_aranges_up->OffsetAtIndex(n); in GetCompileUnitAranges()
57 // The .debug_aranges accelerator is not guaranteed to be complete. in GetCompileUnitAranges()
63 if (!OF || !OF->CanTrustAddressRanges()) { in GetCompileUnitAranges()
68 dw_offset_t offset = cu->GetOffset(); in GetCompileUnitAranges()
70 cu->BuildAddressRangeTable(m_cu_aranges_up.get()); in GetCompileUnitAranges()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCObjectFileInfo.h | 1 //===-- llvm/MC/MCObjectFileInfo.h - Object File Info -----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
38 /// OmitDwarfIfHaveCompactUnwind - True if the target object file
95 /// Accelerator table sections. DwarfDebugNamesSection is the DWARF v5
96 /// accelerator table, while DwarfAccelNamesSection, DwarfAccelObjCSection,
97 /// DwarfAccelNamespaceSection, DwarfAccelTypesSection are pre-DWARF v5
275 MCSection *getDwarfInfoSection(uint64_t Hash) const { in getDwarfInfoSection() argument
276 return getDwarfComdatSection(".debug_info", Hash); in getDwarfInfoSection()
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| /freebsd/share/man/man4/ |
| H A D | aesni.4 | 30 .Nd "driver for the AES and SHA accelerator on x86 CPUs"
35 .Bd -ragged -offset indent
44 .Bd -literal -offset indent
79 is data-independent, thus eliminating some attack vectors based on
80 measuring cache use and timings typically present in table-driven
99 .An -nosplit
110 The hash step intrinsics implementations were supplied by Intel.
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| /freebsd/sys/dev/qat/qat_api/common/crypto/sym/include/ |
| H A D | lac_sym_hash_defs.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2025 Intel Corporation */
8 * @defgroup LacHashDefs Hash Definitions
12 * Constants for hash algorithms
156 * The Pre-compute operation involves deriving 3 128-bit
178 * block size for CBC-MAC part of CCM */
186 * block size for Galois Hash 128 part of CCM */
259 * Maximum size of state1 in the hash setup block of the content descriptor.
264 * Maximum size of state2 in the hash setup block of the content descriptor.
269 * This is got from the maximum size supported by the accelerator which stores
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| H A D | lac_sym_cipher_defs.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2022 Intel Corporation */
56 /* Snow3g cipher config required for performing a Snow3g hash operation.
90 /* 96-bit case of IV for GCM algorithm */
93 /* 96-bit case of IV for CCP/GCM single pass algorithm */
178 /* Macro to check if the Algorithm is AES-F8 */
184 /* Macro to check if the accelerator has AES V2 capability */
188 #define LAC_CIPHER_IS_SPC(cipher, hash, mask) \ argument
190 LAC_CIPHER_IS_CHACHA(cipher) && (CPA_CY_SYM_HASH_POLY == hash)) || \
193 ((CPA_CY_SYM_HASH_AES_GCM == hash) || \
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| /freebsd/sys/dev/qat/qat_api/include/dc/ |
| H A D | cpa_dc_chain.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2025 Intel Corporation */
50 * 2nd operation is to perform hash on compressed text
53 * 2nd entry is for hash setup data*/
64 * 2nd operation is to perform hash on compressed text and
68 * 2nd entry is for hash and encryption setup data*/
73 * hash on compressed & encrypted text
76 * 2nd entry is for encryption and hash setup data*/
86 * 1st operation is to perform hash on plain text
89 * 1st entry is for hash setup data
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| /freebsd/sys/dev/qat/qat_api/include/lac/ |
| H A D | cpa_cy_sym_dp.h | 1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright(c) 2007-2025 Intel Corporation */
19 * for symmetric cipher, hash, and combined cipher and hash
23 * cost of offload - that is, the cycles consumed by the driver in
24 * sending requests to the hardware, and processing responses - needs
28 * - Thread safety is not guaranteed. Each software thread should
31 * - Polling is used, rather than interrupts (which are expensive).
36 * - Buffers and buffer lists are passed using physical addresses,
38 * - For GCM and CCM modes of AES, when performing decryption and
42 * - The ability to enqueue one or more requests without submitting
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