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Searched +full:hardware +full:- +full:voter (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8196-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8196-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guangjie Song <guangjie.song@mediatek.com>
11 - Laura Nao <laura.nao@collabora.com>
15 PLLs -->
16 dividers -->
18 -->
26 - enum:
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H A Dmediatek,mt8196-sys-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/mediatek,mt8196-sys-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guangjie Song <guangjie.song@mediatek.com>
11 - Laura Nao <laura.nao@collabora.com>
15 PLLs -->
16 dividers -->
18 -->
29 - enum:
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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,bcm-voter.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,bcm-voter.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm BCM-Voter Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
13 The Bus Clock Manager (BCM) is a dedicated hardware accelerator that manages
22 - qcom,bcm-voter
24 qcom,tcs-wait:
42 - compatible
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H A Dqcom,rpmh-common.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Georgi Djakov <djakov@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
22 '#interconnect-cells':
25 qcom,bcm-voters:
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H A Dqcom,rpmh.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
11 - Odelu Kukatla <quic_okukatla@quicinc.com>
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
27 - qcom,sc7180-aggre1-noc
28 - qcom,sc7180-aggre2-noc
29 - qcom,sc7180-camnoc-virt
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/linux/drivers/interconnect/qcom/
H A Dbcm-voter.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
7 #include <linux/interconnect-provider.h>
16 #include "bcm-voter.h"
17 #include "icc-rpmh.h"
23 * struct bcm_voter - Bus Clock Manager voter
26 * @lock: mutex to protect commit and wake/sleep lists in the voter
27 * @commit_list: list containing bcms to be committed to hardware
47 return bcm_a->aux_data.vcd - bcm_b->aux_data.vcd; in cmp_vcd()
61 /* BCMs with enable_mask use one-hot-encoding for on/off signaling */
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/linux/drivers/clk/mediatek/
H A Dclk-gate.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
16 #include "clk-mtk.h"
17 #include "clk-gate.h"
36 regmap_read(cg->regmap, cg->gate->regs->sta_ofs, &val); in mtk_get_clockgating()
38 return val & BIT(cg->gate->shift); in mtk_get_clockgating()
55 regmap_write(cg->regmap, cg->gate->regs->set_ofs, BIT(cg->gate->shift)); in mtk_cg_set_bit()
62 regmap_write(cg->regmap, cg->gate->regs->clr_ofs, BIT(cg->gate->shift)); in mtk_cg_clr_bit()
69 regmap_set_bits(cg->regmap, cg->gate->regs->sta_ofs, in mtk_cg_set_bit_no_setclr()
70 BIT(cg->gate->shift)); in mtk_cg_set_bit_no_setclr()
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H A Dclk-mux.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
19 #include "clk-mtk.h"
20 #include "clk-mux.h"
45 if (mux->lock) in mtk_clk_mux_fenc_enable_setclr()
46 spin_lock_irqsave(mux->lock, flags); in mtk_clk_mux_fenc_enable_setclr()
48 __acquire(mux->lock); in mtk_clk_mux_fenc_enable_setclr()
50 regmap_write(mux->regmap, mux->data->clr_ofs, in mtk_clk_mux_fenc_enable_setclr()
51 BIT(mux->data->gate_shift)); in mtk_clk_mux_fenc_enable_setclr()
53 ret = regmap_read_poll_timeout_atomic(mux->regmap, mux->data->fenc_sta_mon_ofs, in mtk_clk_mux_fenc_enable_setclr()
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H A Dclk-mtk.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
19 #include "clk-mtk.h"
20 #include "clk-gate.h"
21 #include "clk-mux.h"
44 clk_data->num = clk_num; in mtk_init_clk_data()
47 clk_data->hws[i] = ERR_PTR(-ENOENT); in mtk_init_clk_data()
93 return -ENOMEM; in mtk_clk_register_fixed_clks()
98 if (!IS_ERR_OR_NULL(clk_data->hws[rc->id])) { in mtk_clk_register_fixed_clks()
99 pr_warn("Trying to register duplicate clock ID: %d\n", rc->id); in mtk_clk_register_fixed_clks()
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