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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,gsbi.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,gsbi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm General Serial Bus Interface (GSBI)
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 The GSBI controller is modeled as a node with zero or more child nodes, each
16 representing a serial sub-node device that is mux'd as part of the GSBI
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq8064-v1.0.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-ipq8064.dtsi"
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/leds/common.h>
7 model = "Qualcomm Technologies, Inc. IPQ8064-v1.0";
14 stdout-path = "serial0:115200n8";
17 gpio-keys {
18 compatible = "gpio-keys";
19 pinctrl-0 = <&buttons_pins>;
20 pinctrl-names = "default";
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H A Dqcom-ipq8064-ap148.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-ipq8064-v1.0.dtsi"
5 model = "Qualcomm Technologies, Inc. IPQ8064/AP-148";
6 compatible = "qcom,ipq8064-ap148", "qcom,ipq8064";
10 buttons_pins: buttons-state {
13 drive-strength = <2>;
14 bias-pull-up;
18 gsbi@16300000 {
21 clock-frequency = <200000>;
22 pinctrl-0 = <&i2c4_pins>;
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/linux/Documentation/devicetree/bindings/serial/
H A Dqcom,msm-uartdm.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/serial/qcom,msm-uartdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 The MSM serial UARTDM hardware is designed for high-speed use cases where the
16 transmit and/or receive channels can be offloaded to a dma-engine. From a
28 - enum:
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