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/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_du_group.c1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit Channels Pair
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
11 * The R8A7779 DU is split in per-CRTC resources (scan-out engine, blending
12 * unit, timings generator, ...) and device-global resources (start/stop
19 * modeled as a single device with three CRTCs, two sets of "semi-global"
20 * resources, and a few device-global resources.
23 * counterpart in the DU documentation, that models those semi-global resources.
35 return rcar_du_read(rgrp->dev, rgrp->mmio_offset + reg); in rcar_du_group_read()
40 rcar_du_write(rgrp->dev, rgrp->mmio_offset + reg, data); in rcar_du_group_write()
[all …]
/linux/drivers/platform/mellanox/
H A Dmlxreg-io.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/hwmon-sysfs.h>
23 * struct mlxreg_io_priv_data - driver's private data:
30 * @group: sysfs attribute group;
31 * @groups: list of sysfs attribute group for hwmon registration;
41 struct attribute_group group; member
53 ret = regmap_read(regmap, data->reg, regval); in mlxreg_io_get_reg()
59 * bits, bit sequence, bits in few registers For the first kind field in mlxreg_io_get_reg()
60 * mask indicates which bits are not related and field bit is set zero. in mlxreg_io_get_reg()
62 * with all bits one. No special handling for such kind of attributes - in mlxreg_io_get_reg()
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/linux/drivers/irqchip/
H A Dirq-riscv-aplic-msi.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/irqchip/riscv-aplic.h>
13 #include <linux/irqchip/riscv-imsic.h>
21 #include "irq-riscv-aplic-main.h"
43 * The section "4.9.2 Special consideration for level-sensitive interrupt in aplic_msi_irq_retrigger_level()
44 * sources" of the RISC-V AIA specification says: in aplic_msi_irq_retrigger_level()
52 writel(d->hwirq, priv->regs + APLIC_SETIPNUM_LE); in aplic_msi_irq_retrigger_level()
60 * EOI handling is required only for level-triggered interrupts in aplic_msi_irq_eoi()
73 * Updating sourcecfg register for level-triggered interrupts in aplic_msi_irq_set_type()
84 struct aplic_msicfg *mc = &priv->msicfg; in aplic_msi_write_msg()
[all …]
/linux/mm/
H A Dpercpu.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * mm/percpu.c - percpu memory allocator
13 * a 1-to-1 mapping for units to possible cpus. These units are grouped
17 * ------------------- ------------------- ------------
19 * ------------------- ...... ------------------- .... ------------
23 * c1:u1, c1:u2, etc. On NUMA machines, the mapping may be non-linear
35 * linker. The reserved section, if non-zero, primarily manages static
40 * memcg-awareness. To make a percpu allocation memcg-aware the __GFP_ACCOUNT
41 * flag should be passed. All memcg-aware allocations are sharing one set
51 * the page's index. Lastly, units are lazily backed and grow in unison.
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/linux/net/netfilter/
H A Dnft_set_pipapo.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2019-2020 Red Hat GmbH
15 * -------
17 * Match packet bytes against entries composed of ranged or non-ranged packet
22 * --- fields --->
33 * ------------------
36 * relies on the consideration that every contiguous range in a space of b bits
40 * Classification against a number of entries, that require matching given bits
41 * of a packet field, is performed by grouping those bits in sets of arbitrary
42 * size, and classifying packet bits one group at a time.
[all …]
H A Dnft_set_pipapo_avx2.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2019-2020 Red Hat GmbH
29 /* Load from memory into YMM register with non-temporal hint ("stream load"),
33 * - loading buckets from lookup tables, as they are not going to be used
36 * - loading the result bitmap from the previous field, as it's never used
43 * group index, value of packet bits, bucket size.
45 #define NFT_PIPAPO_AVX2_BUCKET_LOAD4(reg, lt, group, v, bsize) \ argument
47 lt[((group) * NFT_PIPAPO_BUCKETS(4) + \
49 #define NFT_PIPAPO_AVX2_BUCKET_LOAD8(reg, lt, group, v, bsize) \ argument
51 lt[((group) * NFT_PIPAPO_BUCKETS(8) + \
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/linux/arch/mips/include/asm/octeon/
H A Dcvmx-pow.h7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
31 * New, starting with SDK 1.7.0, cvmx-pow supports a number of
36 * enabled. For example, cvmx-pow will check for the following
38 * - Requesting a POW operation with an active tag switch in
40 * - Waiting for a tag switch to complete for an excessively
43 * - Illegal tag switches from NULL_NULL.
44 * - Illegal tag switches from NULL.
45 * - Illegal deschedule request.
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/linux/tools/perf/
H A Ddesign.txt3 ------------------------------
7 as instructions executed, cachemisses suffered, or branches mis-predicted -
9 trigger interrupts when a threshold number of events have passed - and can
15 provides "virtual" 64-bit counters, regardless of the width of the
41 * 7 bits are an event type and the rest of the bits are the event
53 exclusive : 1, /* only group on PMU */
72 is divided into 3 bit-fields:
75 type: 7 bits (next most significant) 0x7f00_0000_0000_0000
76 event_id: 56 bits (least significant) 0x00ff_ffff_ffff_ffff
79 specified by the remaining 63 bits of event_config. The encoding is
[all …]
/linux/drivers/pinctrl/ti/
H A Dpinctrl-ti-iodelay.c5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com/
23 #include <linux/pinctrl/pinconf-generic.h>
30 #define DRIVER_NAME "ti-iodelay"
33 * struct ti_iodelay_reg_data - Describes the registers for the iodelay instance
34 * @signature_mask: CONFIG_REG mask for the signature bits (see TRM)
36 * @lock_mask: CONFIG_REG mask for the lock bits (see TRM)
37 * @lock_val: CONFIG_REG lock value for the lock bits (see TRM)
38 * @unlock_val:CONFIG_REG unlock value for the lock bits (see TRM)
89 * struct ti_iodelay_reg_values - Computed io_reg configuration values (see TRM)
112 * struct ti_iodelay_cfg - Description of each configuration parameters
[all …]
/linux/drivers/pinctrl/meson/
H A Dpinctrl-meson.h1 /* SPDX-License-Identifier: GPL-2.0-only */
20 * struct meson_pmx_group - a pinmux group
22 * @name: group name
23 * @pins: pins in the group
24 * @num_pins: number of pins in the group
25 * @is_gpio: whether the group is a single GPIO group
26 * @reg: register offset for the group in the domain mux registers
27 * @bit bit index enabling the group
28 * @domain: index of the domain this group belongs to
38 * struct meson_pmx_func - a pinmux function
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/linux/fs/ocfs2/
H A Docfs2_fs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * On-disk structures for OCFS2.
59 ( OCFS2_SB(sb)->s_feature_compat & (mask) )
61 ( OCFS2_SB(sb)->s_feature_ro_compat & (mask) )
63 ( OCFS2_SB(sb)->s_feature_incompat & (mask) )
65 OCFS2_SB(sb)->s_feature_compat |= (mask)
67 OCFS2_SB(sb)->s_feature_ro_compat |= (mask)
69 OCFS2_SB(sb)->s_feature_incompat |= (mask)
71 OCFS2_SB(sb)->s_feature_compat &= ~(mask)
73 OCFS2_SB(sb)->s_feature_ro_compat &= ~(mask)
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/linux/tools/include/uapi/linux/
H A Dvhost.h
/linux/include/uapi/linux/
H A Dvhost.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 /* Userspace interface for in-kernel virtio accelerators. */
18 #define VHOST_FILE_UNBIND -1
24 /* Features bitmask for forward compatibility. Transport bits are used for
76 /* Get accessor: reads index, writes value in num */
80 * or VHOST_VRING_BIG_ENDIAN (other values return -EINVAL).
82 * returns -EBUSY.
130 * used for transmit. Pass fd -1 to unbind from the socket and the transmit
152 * the device id defined in virtio-spec.
155 /* Get and set the status. The status bits follow the same definition
[all …]
/linux/tools/perf/trace/beauty/include/uapi/linux/
H A Dvhost.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
4 /* Userspace interface for in-kernel virtio accelerators. */
18 #define VHOST_FILE_UNBIND -1
24 /* Features bitmask for forward compatibility. Transport bits are used for
76 /* Get accessor: reads index, writes value in num */
80 * or VHOST_VRING_BIG_ENDIAN (other values return -EINVAL).
82 * returns -EBUSY.
130 * used for transmit. Pass fd -1 to unbind from the socket and the transmit
152 * the device id defined in virtio-spec.
155 /* Get and set the status. The status bits follow the same definition
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/linux/Documentation/admin-guide/device-mapper/
H A Dswitch.rst2 dm-switch
5 The device-mapper switch target creates a device that supports an
6 arbitrary mapping of fixed-size regions of I/O across a fixed set of
11 number of fixed-sized address regions but there is no simple pattern
13 dm-stripe.
16 ----------
19 frameless architecture. In this architecture, the storage group
24 The storage group exposes a single target discovery portal, no matter
34 the storage group and initiators. In a multipathing configuration, it
42 A device-mapper table already lets you map different regions of a
[all …]
/linux/fs/jfs/
H A Djfs_dmap.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (C) International Business Machines Corp., 2000-2002
12 #define LEAFIND (64+16+4+1) /* index of 1st leaf of a dmap tree */
24 #define ROOT 0 /* index of the root of a tree */
25 #define NOFREE ((s8) -1) /* no blocks free */
66 * - the number of dmaps preceding it
67 * - the number of L0 pages preceding its L0 page
68 * - the number of L1 pages preceding its L1 page
69 * - 3 is added to account for the L2, L1, and L0 page for this dmap
70 * - 1 is added to account for the control page of the map.
[all …]
/linux/drivers/edac/
H A Dversal_edac.c1 // SPDX-License-Identifier: GPL-2.0
15 #include <linux/firmware/xlnx-zynqmp.h>
16 #include <linux/firmware/xlnx-event-manager.h>
133 * https://docs.xilinx.com/r/en-US/am012-versal-register-reference/PCSR_LOCK-XRAM_SLCR-Register
149 * struct ecc_error_info - ECC error log information.
153 * @group: Group number.
157 * @rowhi: Row number higher bits.
165 u32 group:2; member
195 * struct ecc_status - ECC status information to report.
209 * struct edac_priv - DDR memory controller private instance data.
[all …]
/linux/drivers/block/mtip32xx/
H A Dmtip32xx.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * mtip32xx.h - Header file for the P320 SSD Block Driver
53 * Macro to extract the tag index from a tag value. The index
67 * NOTE: This is the driver maximum; check dd->slot_groups for actual value.
95 * Per-tag bitfield size in longs.
104 (U32_PER_LONG-1))/U32_PER_LONG)
177 #define DEFINE_HANDLER(group) \ argument
178 void mtip_workq_sdbf##group(struct work_struct *work) \
181 mtip_workq_sdbfx(w->port, group, w->completed); \
188 * - 27h Register FIS, host to device.
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/linux/include/linux/irqchip/
H A Driscv-imsic.h1 /* SPDX-License-Identifier: GPL-2.0-only */
49 * XLEN-1 12 0
51 * -------------------------------------------------------------
52 * |xxxxxx|Group Index|xxxxxxxxxxx|HART Index|Guest Index| 0 |
53 * -------------------------------------------------------------
56 /* Bits representing Guest index, HART index, and Group index */
71 /* Per-CPU IMSIC addresses */
/linux/drivers/net/phy/
H A Ddp83td510.c1 // SPDX-License-Identifier: GPL-2.0
16 /* Bit 7 - mii_interrupt, active high. Clears on read.
40 * 32-bit or 16-bit counters for TX and RX statistics and must be read in
43 * - DP83TD510E_PKT_STAT_1: Contains TX packet count bits [15:0].
44 * - DP83TD510E_PKT_STAT_2: Contains TX packet count bits [3
252 dp83td510_led_brightness_set(struct phy_device * phydev,u8 index,enum led_brightness brightness) dp83td510_led_brightness_set() argument
270 dp83td510_led_mode(u8 index,unsigned long rules) dp83td510_led_mode() argument
296 dp83td510_led_hw_is_supported(struct phy_device * phydev,u8 index,unsigned long rules) dp83td510_led_hw_is_supported() argument
308 dp83td510_led_hw_control_set(struct phy_device * phydev,u8 index,unsigned long rules) dp83td510_led_hw_control_set() argument
328 dp83td510_led_hw_control_get(struct phy_device * phydev,u8 index,unsigned long * rules) dp83td510_led_hw_control_get() argument
372 dp83td510_led_polarity_set(struct phy_device * phydev,int index,unsigned long modes) dp83td510_led_polarity_set() argument
[all...]
/linux/drivers/scsi/isci/
H A Dremote_node_table.c7 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
20 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
26 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
65 * @remote_node_table: This is the remote node index table from which the
67 * @group_table_index: This is the index to the group table from which to
71 * + bit position. If there are available bits in the first u32 then it is
73 * group.
83 group_table = remote_node_table->remote_node_groups[group_table_index]; in sci_remote_node_table_get_group_index()
85 for (dword_index = 0; dword_index < remote_node_table->group_array_size; dword_index++) { in sci_remote_node_table_get_group_index()
104 * @group_index: This is the bit index in the table to be modified.
[all …]
/linux/fs/ubifs/
H A Dubifs-media.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2006-2008 Nokia Corporation.
12 * This file describes UBIFS on-flash format and contains definitions of all the
15 * All UBIFS on-flash objects are stored in the form of nodes. All nodes start
17 * always sit at 8-byte aligned positions on the media and node header sizes are
18 * also 8-byte aligned (except for the indexing node and the padding node).
28 * UBIFS on-flash format version. This version is increased when the on-flash
40 * Read-only compatibility version. If the UBIFS format is changed, older UBIFS
41 * implementations will not be able to mount newer formats in read-write mode.
44 * stored in the super-block.
[all …]
/linux/drivers/net/fddi/
H A Ddefxx.h23 * 16-Aug-96 LVS Created.
24 * 09-Sep-96 LVS Added group_prom field. Moved read/write I/O
26 * 12-Sep-96 LVS Removed packet request header pointers.
28 * 23 Oct 2006 macro Big-endian host support.
44 typedef struct /* 64-bit counter */
73 /* Define PHY index values */
75 #define PI_PHY_K_S 0 /* Index to S phy */
76 #define PI_PHY_K_A 0 /* Index to A phy */
77 #define PI_PHY_K_B 1 /* Index to B phy */
178 #define PI_ITEM_K_EOL 0x00 /* End-of-Item list */
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_flex_type.h1 /* SPDX-License-Identifier: GPL-2.0 */
156 /* PTYPE Group management */
158 /* Note: XLT1 table takes 13-bit as input, and results in an 8-bit packet type
159 * group (PTG) ID as output.
161 * Note: PTG 0 is the default packet type group and it is assumed that all PTYPE
162 * are a part of this group until moved to a new PTG.
237 * [0:12]: incremental VSIG index
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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192d/
H A Dphy_common.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2012 Realtek Corporation.*/
25 struct rtl_phy *rtlphy = &rtlpriv->phy; in _rtl92d_phy_rf_serial_read()
26 struct bb_reg_def *pphyreg = &rtlphy->phyreg_def[rfpath]; in _rtl92d_phy_rf_serial_read()
37 tmplong2 = rtl_get_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD); in _rtl92d_phy_rf_serial_read()
43 rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2); in _rtl92d_phy_rf_serial_read()
55 retvalue = rtl_get_bbreg(hw, pphyreg->rf_rbpi, in _rtl92d_phy_rf_serial_read()
58 retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb, in _rtl92d_phy_rf_serial_read()
60 rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x] = 0x%x\n", in _rtl92d_phy_rf_serial_read()
61 rfpath, pphyreg->rf_rb, retvalue); in _rtl92d_phy_rf_serial_read()
[all …]

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