/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | qcom,gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,gpucc.yaml# 17 include/dt-bindings/clock/qcom,gpucc-sdm845.h 18 include/dt-bindings/clock/qcom,gpucc-sa8775p.h 19 include/dt-bindings/clock/qcom,gpucc-sc7180.h 20 include/dt-bindings/clock/qcom,gpucc-sc7280.h 21 include/dt-bindings/clock/qcom,gpucc-sc8280xp.h 22 include/dt-bindings/clock/qcom,gpucc-sm6350.h 23 include/dt-bindings/clock/qcom,gpucc-sm8150.h 24 include/dt-bindings/clock/qcom,gpucc-sm8250.h 25 include/dt-bindings/clock/qcom,gpucc [all...] |
H A D | qcom,sm8450-gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm8450-gpucc.yaml# 17 include/dt-bindings/clock/qcom,sm8450-gpucc.h 18 include/dt-bindings/clock/qcom,sm8550-gpucc.h 19 include/dt-bindings/reset/qcom,sm8450-gpucc.h 20 include/dt-bindings/reset/qcom,sm8650-gpucc.h 25 - qcom,sm8450-gpucc 26 - qcom,sm8550-gpucc 27 - qcom,sm8650-gpucc 67 compatible = "qcom,sm8450-gpucc";
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H A D | qcom,gpucc-sdm660.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,gpucc-sdm660.yaml# 16 See also dt-bindings/clock/qcom,gpucc-sdm660.h. 21 - qcom,gpucc-sdm630 22 - qcom,gpucc-sdm660 65 compatible = "qcom,gpucc-sdm660";
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H A D | qcom,msm8998-gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml# 16 See also:: include/dt-bindings/clock/qcom,gpucc-msm8998.h 20 const: qcom,msm8998-gpucc 60 compatible = "qcom,msm8998-gpucc";
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H A D | qcom,sm6115-gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm6115-gpucc.yaml# 16 See also:: include/dt-bindings/clock/qcom,sm6115-gpucc.h 21 - qcom,sm6115-gpucc 48 compatible = "qcom,sm6115-gpucc";
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H A D | qcom,sm6125-gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm6125-gpucc.yaml# 16 See also:: include/dt-bindings/clock/qcom,sm6125-gpucc.h 21 - qcom,sm6125-gpucc 56 compatible = "qcom,sm6125-gpucc";
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H A D | qcom,sc7180-gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sc7180-gpucc.yaml# 16 See also dt-bindings/clock/qcom,gpucc-sc7180.h. 20 const: qcom,sc7180-gpucc 62 compatible = "qcom,sc7180-gpucc";
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H A D | qcom,sdm845-gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sdm845-gpucc.yaml# 16 See also dt-bindings/clock/qcom,gpucc-sdm845.h. 20 const: qcom,sdm845-gpucc 62 compatible = "qcom,sdm845-gpucc";
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H A D | qcom,gpucc-sm8350.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,gpucc-sm8350.yaml# 16 See also:: include/dt-bindings/clock/qcom,gpucc-sm8350.h 21 - qcom,sm8350-gpucc 61 compatible = "qcom,sm8350-gpucc";
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H A D | qcom,sm6375-gpucc.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,sm6375-gpucc.yaml# 16 See also:: include/dt-bindings/clock/qcom,sm6375-gpucc.h 21 - qcom,sm6375-gpucc 62 compatible = "qcom,sm6375-gpucc";
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/freebsd/sys/contrib/device-tree/Bindings/display/msm/ |
H A D | gmu.yaml | 285 #include <dt-bindings/clock/qcom,gpucc-sdm845.h> 298 clocks = <&gpucc GPU_CC_CX_GMU_CLK>, 299 <&gpucc GPU_CC_CXO_CLK>, 308 power-domains = <&gpucc GPU_CX_GDSC>, 309 <&gpucc GPU_GX_GDSC>; 320 power-domains = <&gpucc GPU_CX_GDSC>, 321 <&gpucc GPU_GX_GDSC>;
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H A D | gpu.yaml | 190 description: GPUCC clocksource clock 274 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
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/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | qcom-soc.yaml | 47 - qcom,gpucc-sdm630 48 - qcom,gpucc-sdm660
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | sdm660.dtsi | 140 &gpucc { 141 compatible = "qcom,gpucc-sdm660";
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H A D | sa8775p.dtsi | 10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h> 1803 gpucc: clock-controller@3d90000 { 1804 compatible = "qcom,sa8775p-gpucc"; 1824 power-domains = <&gpucc GPU_CC_CX_GDSC>; 1827 <&gpucc GPU_CC_AHB_CLK>, 1828 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>, 1829 <&gpucc GPU_CC_CX_GMU_CLK>, 1830 <&gpucc GPU_CC_HUB_CX_INT_CLK>, 1831 <&gpucc GPU_CC_HUB_AON_CLK>; 1790 gpucc: clock-controller@3d90000 { global() label
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H A D | sm8350.dtsi | 10 #include <dt-bindings/clock/qcom,gpucc-sm8350.h> 1925 clocks = <&gpucc GPU_CC_CX_GMU_CLK>, 1926 <&gpucc GPU_CC_CXO_CLK>, 1929 <&gpucc GPU_CC_AHB_CLK>, 1930 <&gpucc GPU_CC_HUB_CX_INT_CLK>, 1931 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; 1940 power-domains = <&gpucc GPU_CX_GDSC>, 1941 <&gpucc GPU_GX_GDSC>; 1959 gpucc: clock-controller@3d90000 { 1960 compatible = "qcom,sm8350-gpucc"; 1935 gpucc: clock-controller@3d90000 { global() label [all...] |
H A D | sdm630.dtsi | 8 #include <dt-bindings/clock/qcom,gpucc-sdm660.h> 1080 <&gpucc GPUCC_RBBMTIMER_CLK>, 1083 <&gpucc GPUCC_RBCPR_CLK>, 1084 <&gpucc GPUCC_GFX3D_CLK>; 1165 power-domains = <&gpucc GPU_GX_GDSC>; 1191 gpucc: clock-controller@5065000 { 1192 compatible = "qcom,gpucc-sdm630"; 1145 gpucc: clock-controller@5065000 { global() label
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H A D | sc7280.dtsi | 10 #include <dt-bindings/clock/qcom,gpucc-sc7280.h> 2819 clocks = <&gpucc GPU_CC_CX_GMU_CLK>, 2820 <&gpucc GPU_CC_CXO_CLK>, 2823 <&gpucc GPU_CC_AHB_CLK>, 2824 <&gpucc GPU_CC_HUB_CX_INT_CLK>, 2825 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; 2833 power-domains = <&gpucc GPU_CC_CX_GDSC>, 2834 <&gpucc GPU_CC_GX_GDSC>; 2850 gpucc: clock-controller@3d90000 { 2851 compatible = "qcom,sc7280-gpucc"; 2687 gpucc: clock-controller@3d90000 { global() label [all...] |
H A D | sc8280xp.dtsi | 9 #include <dt-bindings/clock/qcom,gpucc-sc8280xp.h> 2429 clocks = <&gpucc GPU_CC_CX_GMU_CLK>, 2430 <&gpucc GPU_CC_CXO_CLK>, 2433 <&gpucc GPU_CC_AHB_CLK>, 2434 <&gpucc GPU_CC_HUB_CX_INT_CLK>, 2435 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; 2443 power-domains = <&gpucc GPU_CC_CX_GDSC>, 2444 <&gpucc GPU_CC_GX_GDSC>; 2465 gpucc: clock-controller@3d90000 { 2466 compatible = "qcom,sc8280xp-gpucc"; 2463 gpucc: clock-controller@3d90000 { global() label [all...] |
H A D | msm8998.dtsi | 6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h> 1491 <&gpucc RBBMTIMER_CLK>, 1494 <&gpucc RBCPR_CLK>, 1495 <&gpucc GFX3D_CLK>; 1577 power-domains = <&gpucc GPU_GX_GDSC>; 1581 gpucc: clock-controller@5065000 { 1582 compatible = "qcom,msm8998-gpucc"; 1569 gpucc: clock-controller@5065000 { global() label
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H A D | sc8180x.dtsi | 9 #include <dt-bindings/clock/qcom,gpucc-sm8150.h> 2232 clocks = <&gpucc GPU_CC_AHB_CLK>, 2233 <&gpucc GPU_CC_CX_GMU_CLK>, 2234 <&gpucc GPU_CC_CXO_CLK>, 2239 power-domains = <&gpucc GPU_CX_GDSC>, 2240 <&gpucc GPU_GX_GDSC>; 2262 gpucc: clock-controller@2c90000 { 2263 compatible = "qcom,sc8180x-gpucc"; 2291 clocks = <&gpucc GPU_CC_AHB_CLK>, 2296 power-domains = <&gpucc GPU_CX_GDS 2298 gpucc: clock-controller@2c90000 { global() label [all...] |
H A D | sa8540p.dtsi | 170 &gpucc {
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H A D | sm8150.dtsi | 16 #include <dt-bindings/clock/qcom,gpucc-sm8150.h> 2261 clocks = <&gpucc GPU_CC_AHB_CLK>, 2262 <&gpucc GPU_CC_CX_GMU_CLK>, 2263 <&gpucc GPU_CC_CXO_CLK>, 2268 power-domains = <&gpucc GPU_CX_GDSC>, 2269 <&gpucc GPU_GX_GDSC>; 2288 gpucc: clock-controller@2c90000 { 2289 compatible = "qcom,sm8150-gpucc"; 2317 clocks = <&gpucc GPU_CC_AHB_CLK>, 2322 power-domains = <&gpucc GPU_CX_GDS 2304 gpucc: clock-controller@2c90000 { global() label [all...] |
H A D | sc7180.dtsi | 10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h> 2193 power-domains = <&gpucc CX_GDSC>; 2204 clocks = <&gpucc GPU_CC_CX_GMU_CLK>, 2205 <&gpucc GPU_CC_CXO_CLK>, 2209 power-domains = <&gpucc CX_GDSC>, <&gpucc GX_GDSC>; 2224 gpucc: clock-controller@5090000 { 2225 compatible = "qcom,sc7180-gpucc"; 2148 gpucc: clock-controller@5090000 { global() label
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H A D | sm6115.dtsi | 8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h> 1630 clocks = <&gpucc GPU_CC_GX_GFX3D_CLK>, 1631 <&gpucc GPU_CC_AHB_CLK>, 1634 <&gpucc GPU_CC_CX_GMU_CLK>, 1635 <&gpucc GPU_CC_CXO_CLK>; 1717 power-domains = <&gpucc GPU_CX_GDSC>, 1718 <&gpucc GPU_GX_GDSC>; 1722 gpucc: clock-controller@5990000 { 1723 compatible = "qcom,sm6115-gpucc"; 1748 <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CL 1319 gpucc: clock-controller@5990000 { global() label [all...] |