Searched full:gpll0 (Results 1 – 25 of 77) sorted by relevance
1234
| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | qcom,mmcc.yaml | 113 - description: MMSS GPLL0 voted clock
114 - description: GPLL0 voted clock
141 - description: MMSS GPLL0 voted clock
142 - description: GPLL0 voted clock
180 - description: MMSS GPLL0 voted clock
181 - description: GPLL0 clock
182 - description: GPLL0 voted clock
197 - const: gpll0
244 - const: gpll0
274 - const: gpll0
[all...] |
| H A D | qcom,msm8998-gpucc.yaml | 25 - description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src)
30 - const: gpll0
54 clock-names = "xo", "gpll0";
|
| H A D | qcom,sm6115-gpucc.yaml | 26 - description: GPLL0 main branch source
27 - description: GPLL0 main div source
|
| H A D | qcom,sc7180-gpucc.yaml | 25 - description: GPLL0 main branch source
26 - description: GPLL0 div branch source
|
| H A D | qcom,sdm845-gpucc.yaml | 25 - description: GPLL0 main branch source
26 - description: GPLL0 div branch source
|
| H A D | qcom,gpucc-sm8350.yaml | 26 - description: GPLL0 main branch source
27 - description: GPLL0 div branch source
|
| H A D | qcom,gpucc-sdm660.yaml | 27 - description: GPLL0 main gpu branch
28 - description: GPLL0 divider gpu branch
|
| H A D | qcom,sm6375-gpucc.yaml | 26 - description: GPLL0 main branch source
27 - description: GPLL0 div branch source
|
| H A D | qcom,qcm2290-dispcc.yaml | 26 - description: GPLL0 source from GCC
27 - description: GPLL0 div source from GCC
|
| H A D | qcom,sm8450-gpucc.yaml | 36 - description: GPLL0 main branch source
37 - description: GPLL0 div branch source
|
| H A D | qcom,qcm2290-gpucc.yaml | 30 - description: GPLL0 main branch source
31 - description: GPLL0 div branch source
|
| H A D | qcom,sdm845-dispcc.yaml | 28 - description: GPLL0 source from GCC
29 - description: GPLL0 div source from GCC
|
| H A D | qcom,gpucc.yaml | 44 - description: GPLL0 main branch source
45 - description: GPLL0 div branch source
|
| H A D | qcom,sm6375-dispcc.yaml | 28 - description: GPLL0 source from GCC
|
| H A D | qcom,sm6115-dispcc.yaml | 29 - description: GPLL0 DISP DIV clock from GCC
|
| H A D | qcom,sm6125-gpucc.yaml | 26 - description: GPLL0 main branch source
|
| H A D | qcom,dispcc-sm6350.yaml | 25 - description: GPLL0 source from GCC
|
| H A D | qcom,sc7180-dispcc.yaml | 25 - description: GPLL0 source from GCC
|
| H A D | qcom,sc7280-dispcc.yaml | 25 - description: GPLL0 source from GCC
|
| /freebsd/sys/contrib/device-tree/Bindings/interconnect/ |
| H A D | qcom,osm-l3.yaml | 66 #define GPLL0 165
73 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
|
| /freebsd/sys/contrib/device-tree/Bindings/remoteproc/ |
| H A D | qcom,msm8996-mss-pil.yaml | 220 - description: GCC MSS GPLL0 clock
255 - description: GCC MSS GPLL0 clock
292 - description: GCC MSS GPLL0 clock
|
| /freebsd/sys/contrib/device-tree/Bindings/cpufreq/ |
| H A D | cpufreq-qcom-hw.txt | 16 Definition: clock handle for XO clock and GPLL0 clock.
167 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
|
| H A D | cpufreq-qcom-hw.yaml | 69 - description: GPLL0 Clock
364 clocks = <&rpmhcc RPMH_CXO_CLK>, <&gcc GPLL0>;
|
| /freebsd/sys/contrib/device-tree/Bindings/mailbox/ |
| H A D | qcom,apcs-kpss-global.yaml | 158 - description: GCC GPLL0 clock source
163 - const: gpll0
|
| /freebsd/sys/contrib/device-tree/include/dt-bindings/clock/ |
| H A D | qcom,gcc-mdm9607.h | 9 #define GPLL0 0 macro
|
1234