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Searched +full:gpio3 +full:- +full:monitor +full:- +full:enable (Results 1 – 12 of 12) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/iio/addac/
H A Dadi,ad74115.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/contrib/device-tree/Bindings/hwmon/
H A Dadi,ltc4282.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nuno Sa <nuno.sa@analog.com>
15 https://www.analog.com/media/en/technical-documentation/data-sheets/ltc4282.pdf
20 - adi,ltc4282
25 vdd-supply: true
30 '#clock-cells':
33 adi,rsense-nano-ohms:
36 adi,vin-mode-microvolt:
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx7d-flex-concentrator.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "imx7d-tqma7.dtsi"
14 /delete-node/ &ds1339;
18 compatible = "kam,imx7d-flex-concentrator", "fsl,imx7d";
22 /* 1024 MB - TQMa7D board configuration */
26 reg_usb_otg2_vbus: regulator-us
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra186-p3310.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
47 phy: ethernet-phy@0 {
48 compatible = "ethernet-phy-ieee802.3-c22";
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H A Dtegra186-p3509-0000+p3636-0001.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/mfd/max77620.h>
12 compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186";
30 stdout-path = "serial0:115200n8";
41 phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>;
42 phy-handle = <&phy>;
43 phy-mode = "rgmii-id";
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/freebsd/sys/contrib/device-tree/src/arm/nxp/vf/
H A Dvf610-zii-cfu1.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
15 stdout-path = &uart0;
23 gpio-leds {
24 compatible = "gpio-leds";
25 pinctrl-0 = <&pinctrl_leds_debug>;
26 pinctrl-names = "default";
28 led-debu
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H A Dvf610-zii-ssmb-spu3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 * SSMB - SPU3 Switch Management Board
7 * SPU - Seat Power Unit
11 * Based on an original 'vf610-twr.dts' which is Copyright 2015,
15 /dts-v1/;
23 stdout-path = &uart0;
31 gpio-leds {
32 compatible = "gpio-led
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-coolpi-cm5-genbook.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include "rk3588-coolpi-cm5.dtsi"
14 compatible = "coolpi,pi-cm5-genbook", "coolpi,pi-cm5", "rockchip,rk3588";
17 compatible = "pwm-backlight";
18 enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
19 pinctrl-names = "default";
20 pinctrl-0 = <&bl_en>;
21 power-supply = <&vcc12v_dcin>;
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H A Drk3588s-gameforce-ace.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 /dts-v1/;
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/linux-event-codes.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include <dt-bindings/thermal/thermal.h>
11 #include <dt-bindings/usb/pd.h>
16 chassis-type = "handset";
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H A Drk3399-pinebook-pro.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include <dt-bindings/usb/pd.h>
13 #include <dt-bindings/leds/common.h>
18 compatible = "pine64,pinebook-pro", "rockchip,rk3399";
19 chassis-type = "laptop";
28 stdout-path = "serial2:1500000n8";
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
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/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
73 … 0x003818UL //Access:RW DataWidth:0x6 // Statistic mask enable Bit5 : Mask Messa…
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
98 … (0x1<<0) // I/O space access enable. There are no I/O…
100 … (0x1<<1) // Memory space access enable.
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