/freebsd/sys/contrib/device-tree/Bindings/gpio/ |
H A D | xlnx,gpio-xilinx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/xlnx,gpio [all...] |
H A D | gpio-xilinx.txt | 1 Xilinx plb/axi GPIO controller 3 Dual channel GPIO controller with configurable number of pins 9 - compatible : Should be "xlnx,xps-gpio-1.00.a" 10 - reg : Address and length of the register set for the device 11 - #gpio-cells : Should be two. The first cell is the pin number and the 13 - gpio-controller : Marks the device node as a GPIO controller. 16 - clocks : Input clock specifier. Refer to common clock bindings. 17 - interrupts : Interrupt mapping for GPIO IRQ. 18 - xlnx,all-inputs : if n-th bit is setup, GPIO-n is input 19 - xlnx,dout-default : if n-th bit is 1, GPIO-n default value is 1 [all …]
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H A D | gpio-mmio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/gpio-mmio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Generic MMIO GPIO 10 - Linus Walleij <linus.walleij@linaro.org> 11 - Bartosz Golaszewski <brgl@bgdev.pl> 14 Some simple GPIO controllers may consist of a single data register or a pair 15 of set/clear-bit registers. Such controllers are common for glue logic in 16 FPGAs or ASICs. Commonly, these controllers are accessed over memory-mapped [all …]
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/freebsd/sys/contrib/device-tree/Bindings/auxdisplay/ |
H A D | hit,hd44780.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Geert Uytterhoeven <geert@linux-m68k.org> 15 interface, which can be used in either 4-bit or 8-bit mode. By using a 16 GPIO expander it is possible to use the driver with one of the popular I2C 24 data-gpios: 26 GPIO pins connected to the data signal lines DB0-DB7 (8-bit mode) or 27 DB4-DB7 (4-bit mode) of the LCD Controller's bus interface. 29 - maxItems: 4 [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | gpio-control-nand.txt | 1 GPIO assisted NAND flash 3 The GPIO assisted NAND flash uses a memory mapped interface to 4 read/write the NAND commands and data and GPIO pins for the control 8 - compatible : "gpio-control-nand" 9 - reg : should specify localbus chip select and size used for the chip. The 12 - #address-cells, #size-cells : Must be present if the device has sub-nodes 14 - gpios : Specifies the GPIO pins to control the NAND device. The order of 15 GPIO references is: RDY, nCE, ALE, CLE, and nWP. nCE and nWP are optional. 18 - bank-width : Width (in bytes) of the device. If not present, the width 20 - chip-delay : chip dependent delay for transferring data from array to [all …]
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H A D | ti,gpmc-nand.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mtd/ti,gpmc-nand.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 11 - Roger Quadros <rogerq@kernel.org> 20 - enum: 21 - ti,am64-nand 22 - ti,omap2-nand 29 - description: Interrupt for fifoevent [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8mn-rve-gateway.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 /dts-v1/; 8 #include <dt-bindings/usb/pd.h> 9 #include "imx8mn-var-som.dtsi" 13 compatible = "rve,gateway", "variscite,var-som-mx8mn", "fsl,imx8mn"; 15 crystal_duart_24m: crystal-duart-24m { 16 compatible = "fixed-clock"; 17 #clock-cells = <0>; 18 clock-frequency = <24000000>; 21 gpio-keys { [all …]
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H A D | fsl-ls1028a-kontron-sl28.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Device Tree file for the Kontron SMARC-sAL28 board. 9 /dts-v1/; 10 #include "fsl-ls1028a.dtsi" 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpi [all...] |
/freebsd/sys/contrib/device-tree/src/riscv/sophgo/ |
H A D | cv18xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/clock/sophgo,cv1800.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 16 #address-cells = <1>; 17 #size-cells = <0>; 18 timebase-frequency = <25000000>; 24 d-cache-block-size = <64>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | pinctrl-single.txt | 1 One-register-per-pin type device tree based pinctrl driver 4 - compatible : "pinctrl-single" or "pinconf-single". 5 "pinctrl-single" means that pinconf isn't supported. 6 "pinconf-single" means that generic pinconf is supported. 8 - reg : offset and length of the register set for the mux registers 10 - #pinctrl-cells : number of cells in addition to the index, set to 1 11 or 2 for pinctrl-single,pins and set to 2 for pinctrl-single,bits 13 - pinctrl-single,register-width : pinmux register access width in bits 15 - pinctrl-single,function-mask : mask of allowed pinmux function bits 19 - pinctrl-single,function-off : function off mode for disabled state if [all …]
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H A D | pinctrl-single.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-single.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Tony Lindgren <tony@atomide.com> 21 - enum: 22 - pinctrl-single 23 - pinconf-single 24 - items: 25 - enum: [all …]
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/freebsd/sys/contrib/device-tree/src/arm/marvell/ |
H A D | orion5x-rd88f5182-nas.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 2 // Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 4 /dts-v1/; 6 #include <dt-bindings/gpio/gpio.h> 7 #include "orion5x-mv88f5182.dtsi" 11 compatible = "marvell,rd-88f5182-nas", "marvell,orion5x-88f5182", "marvell,orion5x"; 20 stdout-path = &uart0; 30 gpio-leds { 31 compatible = "gpio-leds"; 32 pinctrl-0 = <&pmx_debug_led>; [all …]
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H A D | mmp2-olpc-xo-1-75.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 8 /dts-v1/; 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/input/linux-event-codes.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/clock/marvell,mmp2-audio.h> 16 model = "OLPC XO-1.75"; 17 compatible = "olpc,xo-1.75", "mrvl,mmp2"; 20 #address-cells = <1>; 21 #size-cells = <1>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/bitmain/ |
H A D | bm1880.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include <dt-bindings/clock/bm1880-clock.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/reset/bitmain,bm1880-rese [all...] |
/freebsd/sys/contrib/device-tree/Bindings/display/panel/ |
H A D | panel-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/display/panel/panel-common.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Lauren [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
H A D | ac5-98dx25xx.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; 20 #address-cells = <2>; 21 #size-cells = <0>; 23 cpu-map { 36 compatible = "arm,cortex-a55"; [all …]
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/freebsd/sys/contrib/device-tree/src/arc/ |
H A D | axs10x_mb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013-15 Synopsys, Inc. (www.synopsys.com) 14 compatible = "simple-bus"; 15 #address-cells = <1>; 16 #size-cells = <1>; 18 interrupt-parent = <&mb_intc>; 20 creg_rst: reset-controller@11220 { 21 compatible = "snps,axs10x-reset"; 22 #reset-cells = <1>; 27 compatible = "snps,axs10x-i2s-pll-clock"; [all …]
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/freebsd/sys/contrib/device-tree/src/riscv/thead/ |
H A D | th1520.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 #include <dt-bindings/interrupt-controller/irq.h> 8 #include <dt-bindings/clock/thead,th1520-clk-ap.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 16 #address-cells = <1>; 17 #size-cells = <0>; 18 timebase-frequency = <3000000>; 24 riscv,isa-base = "rv64i"; 25 riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "zicntr", "zicsr", [all …]
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/freebsd/sys/contrib/device-tree/src/arm/microchip/ |
H A D | sama5d3xmb.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * sama5d3xmb.dts - Device Tree file for SAMA5D3x mother board 16 pinctrl-names = "default"; 17 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>; 21 bus-width = <4>; 22 cd-gpios = <&pioD 17 GPIO_ACTIVE_HIGH>; 31 spi-max-frequency = <50000000>; 37 atmel,clk-from-rk-pin; 50 clock-names = "mclk"; 58 pinctrl-names = "default"; [all …]
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/freebsd/sys/contrib/device-tree/src/mips/netlogic/ |
H A D | xlp_evp.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 model = "netlogic,XLP-EVP"; 10 #address-cells = <2>; 11 #size-cells = <2>; 14 #address-cells = <2>; 15 #size-cells = <1>; 16 compatible = "simple-bus"; 24 reg-shift = <2>; 25 reg-io-width = <4>; [all …]
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H A D | xlp_fvp.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 model = "netlogic,XLP-FVP"; 10 #address-cells = <2>; 11 #size-cells = <2>; 14 #address-cells = <2>; 15 #size-cells = <1>; 16 compatible = "simple-bus"; 24 reg-shift = <2>; 25 reg-io-width = <4>; [all …]
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H A D | xlp_svp.dts | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 8 model = "netlogic,XLP-SVP"; 10 #address-cells = <2>; 11 #size-cells = <2>; 14 #address-cells = <2>; 15 #size-cells = <1>; 16 compatible = "simple-bus"; 24 reg-shift = <2>; 25 reg-io-width = <4>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
H A D | dra72-evm-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2014-2016 Texas Instruments Incorporated - https://www.ti.com/ 5 /dts-v1/; 8 #include "dra7-ipu-dsp-commo [all...] |
/freebsd/sys/contrib/device-tree/src/mips/ingenic/ |
H A D | cu1000-neo.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/clock/ingenic,sysost.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 10 compatible = "yna,cu1000-neo", "ingenic,x1000e"; 11 model = "YSH & ATIL General Board CU1000-Neo"; 18 stdout-path = "serial2:115200n8"; 27 compatible = "gpio-leds"; 28 led-0 { [all …]
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H A D | cu1830-neo.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 5 #include <dt-bindings/gpio/gpio.h> 6 #include <dt-bindings/clock/ingenic,sysost.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 10 compatible = "yna,cu1830-neo", "ingenic,x1830"; 11 model = "YSH & ATIL General Board CU1830-Neo"; 18 stdout-path = "serial1:115200n8"; 27 compatible = "gpio-leds"; 28 led-0 { [all …]
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