/freebsd/sys/contrib/device-tree/src/arc/ |
H A D | abilis_tb101.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 15 bus-frequency = <166666666>; 18 clock-frequency = <1000000000>; 21 clock-mult = <1>; 22 clock-div = <2>; 25 clock-mult = <1>; 26 clock-div = <6>; 31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */ 34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */ 37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */ [all …]
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H A D | abilis_tb100.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 15 bus-frequency = <166666666>; 18 clock-frequency = <1000000000>; 21 clock-mult = <1>; 22 clock-div = <2>; 25 clock-mult = <1>; 26 clock-div = <6>; 31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */ 34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */ 37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */ [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/st/ |
H A D | stm32mp25xxai-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 10 gpioa: gpio@44240000 { 13 gpio-ranges = <&pinctrl 0 0 16>; 16 gpiob: gpio@44250000 { 19 gpio-ranges = <&pinctrl 0 16 16>; 22 gpioc: gpio@44260000 { 25 gpio-ranges = <&pinctrl 0 32 14>; 28 gpiod: gpio@44270000 { 31 gpio-ranges = <&pinctrl 0 48 16>; [all …]
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H A D | stm32mp25xxak-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 10 gpioa: gpio@44240000 { 13 gpio-ranges = <&pinctrl 0 0 16>; 16 gpiob: gpio@44250000 { 19 gpio-ranges = <&pinctrl 0 16 16>; 22 gpioc: gpio@44260000 { 25 gpio-ranges = <&pinctrl 0 32 14>; 28 gpiod: gpio@44270000 { 31 gpio-ranges = <&pinctrl 0 48 16>; [all …]
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H A D | stm32mp25xxal-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 10 gpioa: gpio@44240000 { 13 gpio-ranges = <&pinctrl 0 0 16>; 16 gpiob: gpio@44250000 { 19 gpio-ranges = <&pinctrl 0 16 16>; 22 gpioc: gpio@44260000 { 25 gpio-ranges = <&pinctrl 0 32 14>; 28 gpiod: gpio@44270000 { 31 gpio-ranges = <&pinctrl 0 48 16>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | stm32mp15xxaa-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 10 gpioa: gpio@50002000 { 13 gpio-ranges = <&pinctrl 0 0 16>; 16 gpiob: gpio@50003000 { 19 gpio-ranges = <&pinctrl 0 16 16>; 22 gpioc: gpio@50004000 { 25 gpio-ranges = <&pinctrl 0 32 16>; 28 gpiod: gpio@50005000 { 31 gpio-ranges = <&pinctrl 0 48 16>; [all …]
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H A D | stm32mp15xxac-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 10 gpioa: gpio@50002000 { 13 gpio-ranges = <&pinctrl 0 0 16>; 16 gpiob: gpio@50003000 { 19 gpio-ranges = <&pinctrl 0 16 16>; 22 gpioc: gpio@50004000 { 25 gpio-ranges = <&pinctrl 0 32 16>; 28 gpiod: gpio@50005000 { 31 gpio-ranges = <&pinctrl 0 48 16>; [all …]
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H A D | stm32f469-pinctrl.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "stm32f4-pinctrl.dtsi" 46 compatible = "st,stm32f469-pinctrl"; 48 gpioa: gpio@40020000 { 49 gpio-ranges = <&pinctrl 0 0 16>; 52 gpiob: gpio@40020400 { 53 gpio-ranges = <&pinctrl 0 16 16>; 56 gpioc: gpio@40020800 { 57 gpio-ranges = <&pinctrl 0 32 16>; [all …]
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H A D | stm32f429-pinctrl.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "stm32f4-pinctrl.dtsi" 46 compatible = "st,stm32f429-pinctrl"; 48 gpioa: gpio@40020000 { 49 gpio-ranges = <&pinctrl 0 0 16>; 52 gpiob: gpio@40020400 { 53 gpio-ranges = <&pinctrl 0 16 16>; 56 gpioc: gpio@40020800 { 57 gpio-ranges = <&pinctrl 0 32 16>; [all …]
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H A D | stm32mp15xxad-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 10 gpioa: gpio@50002000 { 13 gpio-ranges = <&pinctrl 0 0 16>; 16 gpiob: gpio@50003000 { 19 gpio-ranges = <&pinctrl 0 16 16>; 22 gpioc: gpio@50004000 { 25 gpio-ranges = <&pinctrl 0 32 16>; 28 gpiod: gpio@50005000 { 31 gpio-ranges = <&pinctrl 0 48 16>; [all …]
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H A D | stm32mp15xxab-pinctrl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 10 gpioa: gpio@50002000 { 13 gpio-ranges = <&pinctrl 0 0 16>; 16 gpiob: gpio@50003000 { 19 gpio-ranges = <&pinctrl 0 16 16>; 22 gpioc: gpio@50004000 { 25 gpio-ranges = <&pinctrl 0 32 16>; 28 gpiod: gpio@50005000 { 31 gpio-ranges = <&pinctrl 0 48 16>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | qcom,pmic-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm PMIC GPIO block 10 - Bjorn Andersson <bjorn.andersson@linaro.org> 13 This binding describes the GPIO block(s) found in the 8xxx series of 19 - enum: 20 - qcom,pm2250-gpio 21 - qcom,pm660-gpio [all …]
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H A D | pinctrl-stmfx.txt | 1 STMicroelectronics Multi-Function eXpander (STMFX) GPIO expander bindings 3 ST Multi-Function eXpander (STMFX) offers up to 24 GPIOs expansion. 7 - compatible: should be "st,stmfx-0300-pinctrl". 8 - #gpio-cells: should be <2>, the first cell is the GPIO number and the second 9 cell is the gpio flags in accordance with <dt-bindings/gpio/gpio.h>. 10 - gpio-controller: marks the device as a GPIO controller. 11 - #interrupt-cells: should be <2>, the first cell is the GPIO number and the 13 <dt-bindings/interrupt-controller/irq.h>. 14 - interrupt-controller: marks the device as an interrupt controller. 15 - gpio-ranges: specifies the mapping between gpio controller and pin [all …]
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H A D | st,stm32-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 4 --- 5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: STM32 GPIO and Pin Mux/Config controller 11 - Alexandre TORGUE <alexandre.torgue@foss.st.com> 14 STMicroelectronics's STM32 MCUs integrate a GPIO and Pin mux/config hardware 17 on-chip controllers onto these pads. 22 - st,stm32f429-pinctrl 23 - st,stm32f469-pinctrl [all …]
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/freebsd/sys/contrib/device-tree/Bindings/gpio/ |
H A D | gpio.txt | 1 Specifying GPIO information for devices 5 ----------------- 7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose 8 of this GPIO for the device. While a non-existent <name> is considered valid 10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old 14 GPIO properties can contain one or more GPIO phandles, but only in exceptional 23 The following example could be used to describe GPIO pins used as device enable 24 and bit-banged data signals: 27 gpio-controller; 28 #gpio-cells = <2>; [all …]
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H A D | socionext,uniphier-gpio.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: UniPhier GPIO controller 10 - Masahiro Yamada <yamada.masahiro@socionext.com> 14 pattern: "^gpio@[0-9a-f]+$" 17 const: socionext,uniphier-gpio 22 gpio-controller: true 24 "#gpio-cells": [all …]
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/freebsd/sys/contrib/device-tree/src/arm/hisilicon/ |
H A D | hi3620.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012-2013 HiSilicon Ltd. 6 * Copyright (C) 2012-2013 Linaro Ltd. 11 #include <dt-bindings/clock/hi3620-clock.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <26000000>; 29 clock-output-names = "apb_pclk"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/hisilicon/ |
H A D | hi3670.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/hi3670-clock.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 compatible = "arm,psci-0.2"; 24 #address-cells = <2>; 25 #size-cells = <0>; 27 cpu-map { [all …]
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H A D | hi3660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/hi3660-clock.h> 10 #include <dt-bindings/thermal/thermal.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 compatible = "arm,psci-0.2"; 24 #address-cells = <2>; 25 #size-cells = <0>; [all …]
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H A D | hi3798cv200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. 8 #include <dt-bindings/clock/histb-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/reset/ti-syscon.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8dxl-ss-lsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 7 compatible = "nxp,imx8dxl-fspi"; 12 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio"; 14 gpio-ranges = <&iomuxc 0 47 13>, 21 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio"; 23 gpio-ranges = <&iomuxc 4 74 5>, 28 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio"; 30 gpio-ranges = <&iomuxc 1 98 2>, 36 compatible = "fsl,imx8dxl-gpio", "fsl,imx35-gpio"; 38 gpio-ranges = <&iomuxc 0 115 4>, [all …]
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H A D | imx8qm-ss-lsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2019-2020 NXP 8 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; 9 gpio-ranges = <&iomuxc 0 0 6>, 15 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; 16 gpio-ranges = <&iomuxc 0 40 4>, 23 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; 24 gpio-ranges = <&iomuxc 0 80 4>, 30 compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; 31 gpio-ranges = <&iomuxc 0 114 2>, [all …]
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H A D | imx8qxp-ss-lsio.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2020 NXP 8 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 9 gpio-ranges = <&iomuxc 1 56 12>, 17 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 18 gpio-ranges = <&iomuxc 0 89 9>, 24 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 25 gpio-ranges = <&iomuxc 0 123 1>, 31 compatible = "fsl,imx8qxp-gpio", "fsl,imx35-gpio"; 32 gpio-ranges = <&iomuxc 0 146 4>, [all …]
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/freebsd/sys/contrib/device-tree/src/mips/pic32/ |
H A D | pic32mzda.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 #include <dt-bindings/clock/microchip,pic32-clock.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 9 #address-cells = <1>; 10 #size-cells = <1>; 11 interrupt-parent = <&evic>; 33 #address-cells = <1>; 34 #size-cells = <0>; 43 compatible = "microchip,pic32mzda-infra"; 49 #clock-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | st,stmfx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectonics Multi-Function eXpander (STMFX) 9 description: ST Multi-Function eXpander (STMFX) is a slave controller using I2C for 10 communication with the main MCU. Its main features are GPIO expansion, 15 - Amelie Delaunay <amelie.delaunay@foss.st.com> 19 const: st,stmfx-0300 27 drive-open-drain: true 29 vdd-supply: true [all …]
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