| /linux/drivers/gpio/ |
| H A D | gpio-lpc18xx.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * GPIO driver for NXP LPC18xx/43xx.
11 #include <linux/gpio/driver.h>
21 /* LPC18xx GPIO register offsets */
27 /* LPC18xx GPIO pin interrupt controller register offsets */
45 struct gpio_chip *gpio; member
49 struct gpio_chip gpio; member
55 static inline void lpc18xx_gpio_pin_ic_isel(struct lpc18xx_gpio_pin_ic *ic, in lpc18xx_gpio_pin_ic_isel() argument
56 u32 pin, bool set) in lpc18xx_gpio_pin_ic_isel() argument
58 u32 val = readl_relaxed(ic->base + LPC18XX_GPIO_PIN_IC_ISEL); in lpc18xx_gpio_pin_ic_isel()
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| H A D | gpio-bd71815.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * Author: yanglsh@embest-tech.com
11 #include <linux/gpio/driver.h>
18 #include <linux/mfd/rohm-bd71815.h>
33 ret = regmap_read(bd71815->regmap, BD71815_REG_GPO, &val); in bd71815gpo_get()
49 return regmap_set_bits(bd71815->regmap, BD71815_REG_GPO, bit); in bd71815gpo_set()
51 return regmap_clear_bits(bd71815->regmap, BD71815_REG_GPO, bit); in bd71815gpo_set()
61 return regmap_update_bits(bdgpio->regmap, in bd71815_gpio_set_config()
66 return regmap_update_bits(bdgpio->regmap, in bd71815_gpio_set_config()
73 return -ENOTSUPP; in bd71815_gpio_set_config()
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| /linux/Documentation/devicetree/bindings/gpio/ |
| H A D | nxp,lpc1850-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nxp,lpc1850-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP LPC18xx/43xx GPIO controller
10 - Frank Li <Frank.Li@nxp.com>
14 const: nxp,lpc1850-gpio
20 reg-names:
23 - const: gpio
24 - const: gpio-pin-ic
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| H A D | nuvoton,sgpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nuvoton,sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jim LIU <JJLIU0@nuvoton.com>
15 Nuvoton NPCM7xx SGPIO module is combines a serial to parallel IC (HC595)
16 and a parallel to serial IC (HC165).
20 to 64 output pins, and up to 64 input pins, the pin is only for GPI or GPO.
21 GPIO pins can be programmed to support the following options
22 - Support interrupt option for each input port and various interrupt
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| H A D | nxp,pcf8575.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nxp,pcf8575.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: PCF857x-compatible I/O expanders
10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
13 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be
14 driven high by a pull-up current source or driven low to ground. This
25 - maxim,max7328
26 - maxim,max7329
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| /linux/drivers/pinctrl/starfive/ |
| H A D | pinctrl-starfive-jh7110.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Pinctrl / GPIO driver for StarFive JH7110 SoC
11 #include <linux/gpio/driver.h>
27 #include <dt-bindings/pinctrl/starfive,jh7110-pinctrl.h>
30 #include "../pinctrl-utils.h"
33 #include "pinctrl-starfive-jh7110.h"
52 * | 31 - 24 | 23 - 16 | 15 - 10 | 9 - 8 | 7 - 0 |
53 * | din | dout | doen | function | pin |
97 struct seq_file *s, unsigned int pin) in jh7110_pin_dbg_show() argument
100 const struct jh7110_pinctrl_soc_info *info = sfp->info; in jh7110_pin_dbg_show()
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| H A D | pinctrl-starfive-jh7100.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Pinctrl / GPIO driver for StarFive JH7100 SoC
11 #include <linux/gpio/driver.h>
26 #include <dt-bindings/pinctrl/pinctrl-starfive-jh7100.h>
29 #include "../pinctrl-utils.h"
33 #define DRIVER_NAME "pinctrl-starfive"
36 * Refer to Section 12. GPIO Registers in the JH7100 data sheet:
37 * https://github.com/starfive-tech/JH7100_Docs
42 * Global enable for GPIO interrupts. If bit 0 is set to 1 the GPIO interrupts
43 * are enabled. If set to 0 the GPIO interrupts are disabled.
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| /linux/drivers/pinctrl/nomadik/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
5 bool "ST-Ericsson ABx500 family Mixed Signal Circuit gpio functions"
9 Select this to enable the ABx500 family IC GPIO driver
12 bool "AB8500 pin controller driver"
16 bool "AB8505 pin controller driver"
24 bool "Nomadik pin controller driver"
32 bool "STN8815 pin controller driver"
36 bool "DB8500 pin controller driver"
|
| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | cs35l32.txt | 5 - compatible : "cirrus,cs35l32"
7 - reg : the I2C address of the device for I2C. Address is determined by the level
8 of the AD0 pin. Level 0 is 0x40 while Level 1 is 0x41.
10 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
18 - cirrus,boost-manager : Boost voltage control.
19 0 = Automatically managed. Boost-converter output voltage is the higher
21 1 = Automatically managed irrespective of audio, adapting for low-power
22 dissipation when LEDs are ON, and operating in Fixed-Boost Bypass Mode
27 - cirrus,sdout-datacfg : Data configuration for dual CS35L32 applications only.
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | pinctrl-rk805.txt | 1 Pincontrol driver for RK805 Power management IC.
3 RK805 has 2 pins which can be configured as GPIO output only.
5 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
7 including the meaning of the phrase "pin configuration node".
10 --------------------------
13 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
14 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
15 <pinctrl-bindings.txt>.
17 The pin configurations are defined as child of the pinctrl states node. Each
18 sub-node have following properties:
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| H A D | rockchip,pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
13 The Rockchip Pinmux Controller enables the IC to share one PAD
16 options with option 0 being used as a GPIO.
18 Please refer to pinctrl-bindings.txt in this directory for details of the
20 phrase "pin configuration node".
22 The Rockchip pin configuration node is a node of a group of pins which can be
25 (also named pin mode) this pin can work on and the 'config' configures
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| H A D | pinctrl-max77620.txt | 1 Pincontrol driver for MAX77620 Power management IC from Maxim Semiconductor.
3 Device has 8 GPIO pins which can be configured as GPIO as well as the
6 Please refer file <devicetree/bindings/pinctrl/pinctrl-bindings.txt>
8 including the meaning of the phrase "pin configuration node".
11 --------------------------
14 - pinctrl-names: A pinctrl state named per <pinctrl-bindings.txt>.
15 - pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
16 <pinctrl-bindings.txt>.
18 The pin configurations are defined as child of the pinctrl states node. Each
19 sub-node have following properties:
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| /linux/drivers/iio/light/ |
| H A D | bh1750.c | 1 // SPDX-License-Identifier: GPL-2.0
8 * http://rohmfs.rohm.com/en/products/databook/datasheet/ic/sensor/light/bh1710fvc-e.pdf
9 * http://rohmfs.rohm.com/en/products/databook/datasheet/ic/sensor/light/bh1715fvc-e.pdf
10 * http://rohmfs.rohm.com/en/products/databook/datasheet/ic/sensor/light/bh1721fvc-e.pdf
11 * http://rohmfs.rohm.com/en/products/databook/datasheet/ic/sensor/light/bh1750fvi-e.pdf
12 * http://rohmfs.rohm.com/en/products/databook/datasheet/ic/sensor/light/bh1751fvi-e.pdf
14 * 7-bit I2C slave addresses:
15 * 0x23 (ADDR pin low)
16 * 0x5C (ADDR pin high)
25 #include <linux/gpio/consumer.h>
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| /linux/Documentation/devicetree/bindings/power/supply/ |
| H A D | bq2515x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: TI bq2515x 500-mA Linear charger family
11 - Andrew Davis <afd@ti.com>
14 The BQ2515x family is a highly integrated battery charge management IC that
17 push-button controller.
26 - ti,bq25150
27 - ti,bq25155
33 ac-detect-gpios:
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| /linux/Documentation/devicetree/bindings/leds/ |
| H A D | kinetic,ktd2692.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Markuss Broks <markuss.broks@gmail.com>
13 KTD2692 is the ideal power solution for high-power flash LEDs.
14 It uses ExpressWire single-wire programming for maximum flexibility.
16 The ExpressWire interface through CTRL pin can control LED on/off and
17 enable/disable the IC, Movie(max 1/3 of Flash current) / Flash mode current,
20 Also, When the AUX pin is pulled high while CTRL pin is high,
21 LED current will be ramped up to the flash-mode current level.
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| /linux/arch/arm/mach-sa1100/include/mach/ |
| H A D | SA-1100.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * FILE SA-1100.h
9 * System StrongARM SA-1100
12 * SA-1100 microprocessor (Advanced RISC Machine (ARM)
14 * StrongARM SA-1100 data sheet version 2.2.
21 #error You must include hardware.h not SA-1100.h
91 * Controller (UDC) Control/Status register end-point 0
94 * Controller (UDC) Control/Status register end-point 1
97 * Controller (UDC) Control/Status register end-point 2
100 * Controller (UDC) Data register end-point 0
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | microchip,usb5744.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip USB5744 4-port Hub Controller
10 Microchip's USB5744 SmartHubTM IC is a 4 port, SuperSpeed (SS)/Hi-Speed (HS),
11 low power, low pin count configurable and fully compliant with the USB 3.1
19 - Michal Simek <michal.simek@amd.com>
20 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>
25 - usb424,2744
26 - usb424,5744
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| /linux/drivers/pinctrl/ |
| H A D | pinctrl-equilibrium.c | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <linux/gpio/driver.h>
11 #include <linux/pinctrl/pinconf-generic.h>
19 #include "pinctrl-equilibrium.h"
21 #define PIN_NAME_FMT "io-%d"
32 raw_spin_lock_irqsave(&gctrl->lock, flags); in eqbr_gpio_disable_irq()
33 writel(BIT(offset), gctrl->membase + GPIO_IRNENCLR); in eqbr_gpio_disable_irq()
34 raw_spin_unlock_irqrestore(&gctrl->lock, flags); in eqbr_gpio_disable_irq()
45 gc->direction_input(gc, offset); in eqbr_gpio_enable_irq()
47 raw_spin_lock_irqsave(&gctrl->lock, flags); in eqbr_gpio_enable_irq()
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| /linux/drivers/mfd/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
21 necessary for using the board's GPIO and MFGPT functionality.
30 Say yes here to add support for the Analog Devices ADP5585 GPIO
33 the GPIO and PWM functions under the corresponding menus.
43 accessing the external gpio extender (LEDs & buttons) and
57 tristate "Active-semi ACT8945A"
62 Support for the ACT8945A PMIC from Active-semi. This device
63 features three step-down DC/DC converters and four low-dropout
79 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
82 called sun4i-gpadc.
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| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | as3722.txt | 1 * ams AS3722 Power management IC.
4 -------------------
5 - compatible: Must be "ams,as3722".
6 - reg: I2C device address.
7 - interrupt-controller: AS3722 has internal interrupt controller which takes the
8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well
10 - #interrupt-cells: Should be set to 2 for IRQ number and flags.
12 of AS3722 are defined at dt-bindings/mfd/as3722.h
14 interrupts.txt, using dt-bindings/irq.
17 --------------------
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| H A D | rohm,bd71828-pmic.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mfd/rohm,bd71828-pmic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matti Vaittinen <mazziesaccount@gmail.com>
13 BD71828GW is a single-chip power management IC for battery-powered portable
14 devices. The IC integrates 7 buck converters, 7 LDOs, and a 1500 mA
15 single-cell linear charger. Also included is a Coulomb counter, a real-time
21 - const: rohm,bd71828
23 - items:
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | msm8916-alcatel-idol347.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 /dts-v1/;
5 #include "msm8916-pm8916.dtsi"
6 #include "msm8916-modem-qdsp6.dtsi"
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/leds/common.h>
15 chassis-type = "handset";
24 stdout-path = "serial0";
27 reserved-memory {
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| /linux/Documentation/devicetree/bindings/leds/backlight/ |
| H A D | kinetic,ktz8866.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jianhua Lu <lujianhua000@gmail.com>
13 The Kinetic Technologies KTZ8866 is a high efficiency 6-channels-current-sinks
15 https://www.kinet-ic.com/ktz8866/
18 - $ref: common.yaml#
27 vddpos-supply:
30 vddneg-supply:
33 enable-gpios:
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| /linux/Documentation/devicetree/bindings/mmc/ |
| H A D | mtk-sd.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
16 - enum:
17 - mediatek,mt2701-mmc
18 - mediatek,mt2712-mmc
19 - mediatek,mt6779-mmc
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| /linux/Documentation/devicetree/bindings/input/touchscreen/ |
| H A D | hideep.txt | 4 - compatible : must be "hideep,hideep-ts"
5 - reg : I2C slave address, (e.g. 0x6C).
6 - interrupts : Interrupt to which the chip is connected.
9 - vdd-supply : It is the controller supply for controlling
11 - vid-supply : It is the controller supply for controlling
13 - reset-gpios : Define for reset gpio pin.
14 It is to use for reset IC.
15 - touchscreen-size-x : X axis size of touchscreen
16 - touchscreen-size-y : Y axis size of touchscreen
17 - linux,keycodes : Specifies an array of numeric keycode values to
[all …]
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