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/linux/drivers/gpu/drm/msm/adreno/
H A Da6xx_hfi.c31 static int a6xx_hfi_queue_read(struct a6xx_gmu *gmu, in a6xx_hfi_queue_read() argument
47 * If we are to assume that the GMU firmware is in fact a rational actor in a6xx_hfi_queue_read()
62 if (!gmu->legacy) in a6xx_hfi_queue_read()
72 static int a6xx_hfi_queue_write(struct a6xx_gmu *gmu, in a6xx_hfi_queue_write() argument
96 if (!gmu->legacy) { in a6xx_hfi_queue_write()
107 gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 0x01); in a6xx_hfi_queue_write()
111 static int a6xx_hfi_wait_for_msg_interrupt(struct a6xx_gmu *gmu, u32 id, u32 seqnum) in a6xx_hfi_wait_for_msg_interrupt() argument
115 struct a6xx_gpu *a6xx_gpu = container_of(gmu, struct a6xx_gpu, gmu); in a6xx_hfi_wait_for_msg_interrupt()
119 ret = gmu_poll_timeout(gmu, REG_A6XX_GMU_GMU2HOST_INTR_INFO, val, in a6xx_hfi_wait_for_msg_interrupt()
128 /* We may timeout because the GMU is temporarily wedged from in a6xx_hfi_wait_for_msg_interrupt()
[all …]
/linux/drivers/clk/qcom/
H A Dgdsc.c696 * On SDM845+ the GPU GX domain is *almost* entirely controlled by the GMU
701 * the GMU crashes it could leave the GX on. In order to successfully bring back
710 * driver. During power up, nothing will happen from the CPU (and the GMU will
731 * is managed by the GMU firmware, and high level OS must not attempt
732 * to disable it. The only exception is during GMU recovery, where the
733 * GMU driver can set GenPD’s synced_poweroff flag to allow explicitly
/linux/arch/arm64/boot/dts/qcom/
H A Dpurwa.dtsi50 &gmu {
51 compatible = "qcom,adreno-gmu-x145.0", "qcom,adreno-gmu";
H A Dsc8280xp.dtsi3403 qcom,gmu = <&gmu>;
3467 gmu: gmu@3d6a000 { label
3468 compatible = "qcom,adreno-gmu-690.0", "qcom,adreno-gmu";
3472 reg-names = "gmu", "rscc", "gmu_pdc";
3475 interrupt-names = "hfi", "gmu";
3483 clock-names = "gmu",
H A Dmonaco.dtsi4964 qcom,gmu = <&gmu>;
5012 gmu: gmu@3d6a000 { label
5013 compatible = "qcom,adreno-gmu-623.0", "qcom,adreno-gmu";
5017 reg-names = "gmu", "rscc", "gmu_pdc";
5020 interrupt-names = "hfi", "gmu";
5027 clock-names = "gmu",
H A Dsm8650.dtsi4212 qcom,gmu = <&gmu>;
4309 gmu: gmu@3d6a000 { label
4310 compatible = "qcom,adreno-gmu-750.1", "qcom,adreno-gmu";
4314 reg-names = "gmu", "rscc", "gmu_pdc";
4318 interrupt-names = "hfi", "gmu";
4328 "gmu",
H A Dglymur.dtsi3837 qcom,gmu = <&gmu>;
3957 gmu: gmu@3d6c000 { label
3958 compatible = "qcom,adreno-gmu-x285.1", "qcom,adreno-gmu";
3961 reg-names = "gmu";
3966 "gmu";
3975 "gmu",
/linux/Documentation/devicetree/bindings/sram/
H A Dqcom,ocmem.yaml120 gmu-sram@0 {