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/linux/drivers/gpu/drm/msm/adreno/
H A Da8xx_gpu.c135 /* Check that the GMU is idle */ in _a8xx_check_idle()
136 if (!a6xx_gmu_isidle(&a6xx_gpu->gmu)) in _a8xx_check_idle()
200 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in a8xx_set_hwcg() local
206 gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_MODE_CNTL, in a8xx_set_hwcg()
208 gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_DELAY_CNTL, in a8xx_set_hwcg()
210 gmu_write(gmu, REG_A6XX_GPU_GMU_AO_GMU_CGC_HYST_CNTL, in a8xx_set_hwcg()
228 * GMU enables clk gating in GBIF during boot up. So, in a8xx_set_hwcg()
636 struct a6xx_gmu *gmu = &a6xx_gpu->gmu; in hw_init() local
642 ret = a6xx_gmu_set_oob(&a6xx_gpu->gmu, GMU_OOB_GPU_SET); in hw_init()
687 gmu_write(&a6xx_gpu->gmu, REG_A8XX_GMU_CX_GMU_POWER_COUNTER_SELECT_XOCLK_1, in hw_init()
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H A Da6xx_gpu_state.h345 /* GMU GX */
354 /* GMU CX */
364 /* GMU AO */
/linux/Documentation/devicetree/bindings/sram/
H A Dqcom,ocmem.yaml120 gmu-sram@0 {
/linux/arch/arm64/boot/dts/qcom/
H A Dagatti.dtsi1665 "gmu",
1675 qcom,gmu = <&gmu_wrapper>;
1744 gmu_wrapper: gmu@596a000 {
1745 compatible = "qcom,adreno-gmu-wrapper";
1747 reg-names = "gmu";
H A Dsm8250-xiaomi-pipa.dts409 &gmu {
H A Dsa8295p-adp.dts335 &gmu {
H A Dmonaco.dtsi4950 qcom,gmu = <&gmu>;
4998 gmu: gmu@3d6a000 { label
4999 compatible = "qcom,adreno-gmu-623.0", "qcom,adreno-gmu";
5003 reg-names = "gmu", "rscc", "gmu_pdc";
5006 interrupt-names = "hfi", "gmu";
5013 clock-names = "gmu",
H A Dhamoa.dtsi578 pld_gmu_mem: pld-gmu@81f36000 {
4057 qcom,gmu = <&gmu>;
4199 gmu: gmu@3d6a000 { label
4200 compatible = "qcom,adreno-gmu-x185.1", "qcom,adreno-gmu";
4204 reg-names = "gmu", "rscc", "gmu_pdc";
4208 interrupt-names = "hfi", "gmu";
4218 "gmu",
H A Dsm8250-xiaomi-elish-common.dtsi539 &gmu {
H A Dsm8250-mtp.dts481 &gmu {
/linux/drivers/media/i2c/
H A Dtvaudio.c530 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */