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/linux/Documentation/devicetree/bindings/net/
H A Drockchip-dwmac.yaml7 title: Rockchip 10/100/1000 Ethernet driver(GMAC)
18 - rockchip,px30-gmac
19 - rockchip,rk3128-gmac
20 - rockchip,rk3228-gmac
21 - rockchip,rk3288-gmac
22 - rockchip,rk3308-gmac
23 - rockchip,rk3328-gmac
24 - rockchip,rk3366-gmac
25 - rockchip,rk3368-gmac
26 - rockchip,rk3399-gmac
[all …]
H A Drenesas,rzn1-gmac.yaml4 $id: http://devicetree.org/schemas/net/renesas,rzn1-gmac.yaml#
7 title: Renesas GMAC
17 - renesas,r9a06g032-gmac
18 - renesas,rzn1-gmac
29 - renesas,r9a06g032-gmac
30 - const: renesas,rzn1-gmac
49 compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac";
H A Dhisilicon-hix5hd2-gmac.txt1 Hisilicon hix5hd2 gmac controller
5 * "hisilicon,hix5hd2-gmac"
6 * "hisilicon,hi3798cv200-gmac"
7 * "hisilicon,hi3516a-gmac"
9 * "hisilicon,hisi-gmac-v1"
10 * "hisilicon,hisi-gmac-v2"
43 compatible = "hisilicon,hi3798cv200-gmac", "hisilicon,hisi-gmac-v2";
H A Dallwinner,sun7i-a20-gmac.yaml4 $id: http://devicetree.org/schemas/net/allwinner,sun7i-a20-gmac.yaml#
7 title: Allwinner A20 GMAC
18 const: allwinner,sun7i-a20-gmac
31 - description: GMAC main clock
56 gmac: ethernet@1c50000 {
57 compatible = "allwinner,sun7i-a20-gmac";
H A Dmediatek-dwmac.yaml21 - mediatek,mt2712-gmac
22 - mediatek,mt8188-gmac
23 - mediatek,mt8195-gmac
35 - mediatek,mt2712-gmac
39 - mediatek,mt8195-gmac
43 - mediatek,mt8188-gmac
44 - const: mediatek,mt8195-gmac
155 compatible = "mediatek,mt2712-gmac", "snps,dwmac-4.20a";
H A Dloongson,ls1b-gmac.yaml4 $id: http://devicetree.org/schemas/net/loongson,ls1b-gmac.yaml#
17 - Dual 10/100/1000Mbps GMAC controllers
30 - loongson,ls1b-gmac
38 - loongson,ls1b-gmac
89 compatible = "loongson,ls1b-gmac", "snps,dwmac-3.50a";
H A Dipq806x-dwmac.txt8 - compatible: should be "qcom,ipq806x-gmac" along with "snps,dwmac"
20 gmac: ethernet@37000000 {
22 compatible = "qcom,ipq806x-gmac";
H A Dairoha,en7581-eth.yaml14 These SoCs have multi-GMAC ports.
72 Ethernet GMAC port associated to the MAC controller
80 description: GMAC port identifier
H A Danarion-gmac.txt7 - compatible: Should be "adaptrum,anarion-gmac", "snps,dwmac"
14 compatible = "adaptrum,anarion-gmac", "snps,dwmac";
/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac-sun8i.c38 * @syscon_field reg_field for the syscon's gmac register
588 struct sunxi_priv_data *gmac = priv; in sun8i_dwmac_init() local
591 if (gmac->regulator) { in sun8i_dwmac_init()
592 ret = regulator_enable(gmac->regulator); in sun8i_dwmac_init()
599 if (gmac->use_internal_phy) { in sun8i_dwmac_init()
608 if (gmac->regulator) in sun8i_dwmac_init()
609 regulator_disable(gmac->regulator); in sun8i_dwmac_init()
776 struct sunxi_priv_data *gmac = priv->plat->bsp_priv; in get_ephy_nodes() local
797 gmac->ephy_clk = of_clk_get(iphynode, 0); in get_ephy_nodes()
798 if (IS_ERR(gmac->ephy_clk)) in get_ephy_nodes()
[all …]
H A Ddwmac1000_dma.c3 This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
144 pr_debug("GMAC: disabling flow control, rxfifo too small(%d)\n", in dwmac1000_configure_fc()
161 pr_debug("GMAC: enable RX store and forward mode\n"); in dwmac1000_dma_operation_mode_rx()
164 pr_debug("GMAC: disable RX SF mode (threshold %d)\n", mode); in dwmac1000_dma_operation_mode_rx()
190 pr_debug("GMAC: enable TX store and forward mode\n"); in dwmac1000_dma_operation_mode_tx()
198 pr_debug("GMAC: disabling TX SF (threshold %d)\n", mode); in dwmac1000_dma_operation_mode_tx()
/linux/drivers/clk/sunxi/
H A Dclk-a20-gmac.c29 * sun7i_a20_gmac_clk_setup - Setup function for A20/A31 GMAC clock module
34 * MII TX clock from PHY >-----|___________ _________|----> to GMAC core
35 * GMAC Int. RGMII TX clk >----|___________\__/__gate---|----> to PHY
39 * The external 125 MHz reference is optional, i.e. GMAC can use its
40 * internal TX clock just fine. The A31 GMAC clock module does not have
43 * To keep it simple, let the GMAC use either the MII TX clock for MII mode,
44 * and its internal TX clock for GMII and RGMII modes. The GMAC driver should
47 * Only the GMAC should use this clock. Altering the clock so that it doesn't
48 * match the GMAC's operation parameters will result in the GMAC not being
49 * able to send traffic out. The GMAC driver should set the clock rate and
[all …]
/linux/drivers/net/ethernet/cortina/
H A Dgemini.h2 /* Register definitions for Gemini GMAC Ethernet device driver
49 * GMAC 0/1 SW TX Q0-5, and GMAC 0/1 HW TX Q0-5
91 /* GMAC 0/1 DMA/TOE register */
145 /* GMAC Hash/Rx/Tx AHB Weighting register */
148 /* TOE GMAC 0/1 register */
332 /* GMAC DMA Control Register
366 /* GMAC Tx Weighting Control Register 0
386 /* GMAC Tx Weighting Control Register 1
410 /* GMAC DMA Tx Description Word 0 Register
434 /* GMAC DMA Tx Description Word 1 Register
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dallwinner,sun7i-a20-gmac-clk.yaml4 $id: http://devicetree.org/schemas/clock/allwinner,sun7i-a20-gmac-clk.yaml#
7 title: Allwinner A20 GMAC TX Clock
18 const: allwinner,sun7i-a20-gmac-clk
45 compatible = "allwinner,sun7i-a20-gmac-clk";
/linux/drivers/pinctrl/sunxi/
H A Dpinctrl-sun6i-a31.c24 SUNXI_FUNCTION(0x2, "gmac"), /* TXD0 */
32 SUNXI_FUNCTION(0x2, "gmac"), /* TXD1 */
40 SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */
48 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
56 SUNXI_FUNCTION(0x2, "gmac"), /* TXD4 */
64 SUNXI_FUNCTION(0x2, "gmac"), /* TXD5 */
72 SUNXI_FUNCTION(0x2, "gmac"), /* TXD6 */
80 SUNXI_FUNCTION(0x2, "gmac"), /* TXD7 */
88 SUNXI_FUNCTION(0x2, "gmac"), /* TXCLK */
95 SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */
[all …]
H A Dpinctrl-sun8i-a83t.c185 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD3 */
190 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD2 */
195 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD1 */
200 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXD0 */
205 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXCK */
210 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXDV */
215 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII RXERR */
220 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD3 */
225 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD2 */
230 SUNXI_FUNCTION(0x4, "gmac")), /* RGMII / MII TXD1 */
[all …]
H A Dpinctrl-sun9i-a80.c24 SUNXI_FUNCTION(0x2, "gmac"), /* RXD3 */
30 SUNXI_FUNCTION(0x2, "gmac"), /* RXD2 */
36 SUNXI_FUNCTION(0x2, "gmac"), /* RXD1 */
42 SUNXI_FUNCTION(0x2, "gmac"), /* RXD0 */
48 SUNXI_FUNCTION(0x2, "gmac"), /* RXCK */
54 SUNXI_FUNCTION(0x2, "gmac"), /* RXCTL */
60 SUNXI_FUNCTION(0x2, "gmac"), /* RXERR */
66 SUNXI_FUNCTION(0x2, "gmac"), /* TXD3 */
72 SUNXI_FUNCTION(0x2, "gmac"), /* TXD2 */
78 SUNXI_FUNCTION(0x2, "gmac"), /* TXEN */
[all …]
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h5-nanopi-neo-plus2.dts40 reg_gmac_3v3: gmac-3v3 {
42 regulator-name = "gmac-3v3";
51 reg_gmac_2v5: gmac-2v5 {
52 /* 2V5 supply for GMAC PHY IO */
54 regulator-name = "gmac-2v5";
/linux/arch/arm64/boot/dts/rockchip/
H A Drk3399-ficus.dts17 ethernet0 = &gmac;
24 clkin_gmac: external-gmac-clock {
79 &gmac {
100 gmac {
H A Drk3399-khadas-edge-v.dts15 ethernet0 = &gmac;
19 &gmac {
/linux/drivers/net/ethernet/chelsio/cxgb/
H A Dgmac.h4 * File: gmac.h *
123 struct gmac { struct
129 extern const struct gmac t1_pm3393_ops; argument
130 extern const struct gmac t1_vsc7326_ops;
/linux/drivers/net/ethernet/marvell/
H A Dsky2.h74 P_CLK_REF_LNK1_GM_DIS = 1<<7, /* Disable Clock Ref. Link1 GMAC */
75 P_CLK_COR_LNK1_GM_DIS = 1<<6, /* Disable Clock Core Link1 GMAC */
829 /* Receive GMAC FIFO (YUKON and Yukon-2) */
831 RX_GMF_EA = 0x0c40,/* 32 bit Rx GMAC FIFO End Address */
832 RX_GMF_AF_THR = 0x0c44,/* 32 bit Rx GMAC FIFO Almost Full Thresh. */
833 RX_GMF_CTRL_T = 0x0c48,/* 32 bit Rx GMAC FIFO Control/Test */
834 RX_GMF_FL_MSK = 0x0c4c,/* 32 bit Rx GMAC FIFO Flush Mask */
835 RX_GMF_FL_THR = 0x0c50,/* 16 bit Rx GMAC FIFO Flush Threshold */
836 RX_GMF_FL_CTRL = 0x0c52,/* 16 bit Rx GMAC FIFO Flush Control */
841 RX_GMF_WP = 0x0c60,/* 32 bit Rx GMAC FIFO Write Pointer */
[all …]
/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst27 Currently, this network device driver is for all STi embedded MAC/GMAC
46 | Ethernet MAC Universal | N/A | 3.73a | GMAC |
227 GMAC, GMAC4/5 and XGMAC core.
249 GMAC Synopsys(R) chips older than the 3.50. At probe time the driver will
270 Jumbo frames are supported and tested for the GMAC. The GSO has been also
276 TSO (TCP Segmentation Offload) feature is supported by GMAC > 4.x and XGMAC
286 and provide SKB packet to stmmac as it is. The GMAC IP will have to perform
319 Timestamps, new GMAC cores support the advanced timestamp features.
325 New GMAC devices provide own way to manage RGMII/SGMII. This information is
372 7) HW uses the GMAC core::
[all …]
/linux/net/mac80211/
H A Daes_gmac.c3 * AES-GMAC for IEEE 802.11 BIP-GMAC-128 and BIP-GMAC-256
/linux/arch/arm/boot/dts/allwinner/
H A Dsun7i-a20-haoyu-marsboard.dts63 &gmac {
117 gmac_txerr: gmac-txerr-pin {
119 function = "gmac";

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