/freebsd/sys/contrib/device-tree/Bindings/reset/ |
H A D | qcom,pdc-global.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/reset/qco [all...] |
H A D | intel,rcu-gw.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/reset/intel,rcu-gw.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: System Reset Controller on Intel Gateway SoCs 10 - Dilip Kota <eswara.kota@linux.intel.com> 15 - intel,rcu-lgm 16 - intel,rcu-xrx200 19 description: Reset controller registers. 22 intel,global-reset: [all …]
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H A D | microchip,rst.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/reset/microchip,rst.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip Sparx5 Switch Reset Controller 10 - Steen Hegelund <steen.hegelund@microchip.com> 11 - Lars Povlsen <lars.povlsen@microchip.com> 14 The Microchip Sparx5 Switch provides reset control and implements the following 16 - One Time Switch Core Reset (Soft Reset) 20 pattern: "^reset-controller@[0-9a-f]+$" [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/fsl/ |
H A D | guts.txt | 1 * Global Utilities Block 3 The global utilities block controls power management, I/O device 4 enabling, power-on-reset configuration monitoring, general-purpose 10 - compatible : Should define the compatible device type for 11 global-utilities. 13 "fsl,qoriq-device-config-1.0" 14 "fsl,qoriq-device-config-2.0" 15 "fsl,<chip>-device-config" 16 "fsl,<chip>-guts" 17 - reg : Offset and length of the register set for the device. [all …]
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/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | phy-stih407-usb.txt | 7 - compatible : should be "st,stih407-usb2-phy" 8 - st,syscfg : phandle of sysconfig bank plus integer array containing phyparam and phyctrl registe… 9 - resets : list of phandle and reset specifier pairs. There should be two entries, one 11 - reset-names : list of reset signal names. Should be "global" and "port" 12 See: Documentation/devicetree/bindings/reset/st,stih407-powerdown.yaml 13 See: Documentation/devicetree/bindings/reset/reset.txt 18 compatible = "st,stih407-usb2-phy"; 19 #phy-cells = <0>; 23 reset-names = "global", "port";
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/freebsd/contrib/llvm-project/llvm/lib/ObjectYAML/ |
H A D | WasmYAML.cpp | 1 //===- WasmYAML.cpp - Wasm YAMLIO implementation --------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 25 // http://llvm.org/docs/CodingStandards.html#provide-a-virtual-method-anchor-for-classes-in-headers 171 SectionType = Section->Type; in mapping() 180 SectionName = CustomSection->Name; in mapping() 186 Section.reset(new WasmYAML::DylinkSection()); in mapping() 190 Section.reset(new WasmYAML::LinkingSection()); in mapping() 194 Section.reset(new WasmYAML::NameSection()); in mapping() [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/imx/ |
H A D | fsl,imx93-src.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx93-src.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX93 System Reset Controller 10 - Peng Fan <peng.fan@nxp.com> 13 The System Reset Controller (SRC) is responsible for the generation of 14 all the system reset signals and boot argument latching. 17 - Deals with all global system reset sources from other modules, 18 and generates global system reset. [all …]
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | qcom,gcc-other.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-other.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Cloc [all...] |
H A D | qcom,gcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controlle [all...] |
H A D | qcom,gcc-msm8916.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8916.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on MSM8916 and MSM8939 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <quic_tdas@quicinc.com> 14 Qualcomm global clock control module provides the clocks, resets and power 18 include/dt-bindings/clock/qcom,gcc-msm8916.h 19 include/dt-bindings/clock/qcom,gcc-msm8939.h [all …]
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H A D | qcom,gcc-msm8660.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8660.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on MSM8660 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <quic_tdas@quicinc.com> 14 Qualcomm global clock control module provides the clocks and resets on 18 include/dt-bindings/clock/qcom,gcc-msm8660.h 19 include/dt-bindings/reset/qcom,gcc-msm8660.h [all …]
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H A D | qcom,mmcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Multimedia Clock & Reset Controller 10 - Jeffre [all...] |
H A D | qcom,gcc-msm8974.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8974.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on MSM8974 (including Pro) and MSM8226 11 - Stephen Boyd <sboyd@kernel.org> 12 - Taniya Das <quic_tdas@quicinc.com> 15 Qualcomm global clock control module provides the clocks, resets and power 19 include/dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974) 20 include/dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and qcom,gcc-msm8974) [all …]
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H A D | qcom,ipq9574-gcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,ipq9574-gcc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on IPQ9574 10 - Bjorn Andersson <andersson@kernel.org> 11 - Anusha Rao <quic_anusha@quicinc.com> 14 Qualcomm global clock control module provides the clocks, resets and power 18 include/dt-bindings/clock/qcom,ipq9574-gcc.h 19 include/dt-bindings/reset/qcom,ipq9574-gcc.h [all …]
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H A D | qcom,gcc-ipq8064.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8064.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on IPQ8064 10 - Ansuel Smith <ansuelsmth@gmail.com> 13 Qualcomm global clock control module provides the clocks, resets and power 17 include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) 18 include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) 21 - $ref: qcom,gcc.yaml# [all …]
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H A D | qcom,gcc-apq8084.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-apq8084.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on APQ8084 10 - Stephen Boyd <sboyd@kernel.org> 11 - Taniya Das <quic_tdas@quicinc.com> 14 Qualcomm global clock control module provides the clocks, resets and power 18 include/dt-bindings/clock/qcom,gcc-apq8084.h 19 include/dt-bindings/reset/qcom,gcc-apq8084.h [all …]
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H A D | qcom,gcc-apq8064.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-apq8064.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Cloc [all...] |
H A D | qcom,gcc-ipq8074.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-ipq8074.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Cloc [all...] |
H A D | qcom,gcc-msm8994.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-msm8994.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on MSM8994 10 - Konrad Dybcio <konrad.dybcio@somainline.org> 13 Qualcomm global clock control module provides the clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,gcc-msm8994.h 21 - qcom,gcc-msm8992 22 - qcom,gcc-msm8994 [all …]
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H A D | qcom,gcc-qcs404.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-qcs404.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Cloc [all...] |
H A D | qcom,gcc-sdx55.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdx55.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on SDX55 10 - Vinod Koul <vkoul@kernel.org> 11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> 14 Qualcomm global clock control module provides the clocks, resets and 17 See also:: include/dt-bindings/clock/qcom,gcc-sdx55.h 21 const: qcom,gcc-sdx55 [all …]
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H A D | qcom,gcc-sm6125.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sm6125.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Qualcomm Global Clock & Reset Controller on SM6125 10 - Konrad Dybcio <konrad.dybcio@somainline.org> 13 Qualcomm global clock control module provides the clocks, resets and power 16 See also:: include/dt-bindings/clock/qcom,gcc-sm6125.h 20 const: qcom,gcc-sm6125 24 - description: Board XO source [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pci/ |
H A D | qcom,pcie-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/qcom,pcie-e [all...] |
/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | stih418.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include "stih418-clock.dtsi" 7 #include "stih407-family.dtsi" 8 #include "stih410-pinctrl.dtsi" 11 #address-cells = <1>; 12 #size-cells = <0>; 15 compatible = "arm,cortex-a9"; 17 /* u-boot puts hpen in SBC dmem at 0xa4 offset */ 18 cpu-release-addr = <0x94100A4>; 22 compatible = "arm,cortex-a9"; [all …]
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/freebsd/contrib/bmake/unit-tests/ |
H A D | directive-include-fatal.mk | 1 # $NetBSD: directive-include-fatal.mk,v 1.4 2023/06/01 20:56:35 rillig Exp $ 5 # At 2020-09-13, the code in Parse_File that sets "fatals = 0" looked 8 # the top-level makefiles from the command line. Any included files are 9 # handled by IncludeFile instead, and that function does not reset 17 # Including another file does not reset the global variable "fatals". 23 # in the global "makefiles" variable, but not immediately run through 25 .MAKEFLAGS: -f "/dev/null"
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