Searched full:gicp (Results 1 – 3 of 3) sorted by relevance
42 static int gicp_idx_to_spi(struct mvebu_gicp *gicp, int idx) in gicp_idx_to_spi() argument46 for (i = 0; i < gicp->spi_ranges_cnt; i++) { in gicp_idx_to_spi()47 struct mvebu_gicp_spi_range *r = &gicp->spi_ranges[i]; in gicp_idx_to_spi()60 struct mvebu_gicp *gicp = data->chip_data; in gicp_compose_msi_msg() local61 phys_addr_t setspi = gicp->res->start + GICP_SETSPI_NSR_OFFSET; in gicp_compose_msi_msg()62 phys_addr_t clrspi = gicp->res->start + GICP_CLRSPI_NSR_OFFSET; in gicp_compose_msi_msg()73 .name = "GICP",85 struct mvebu_gicp *gicp = domain->host_data; in gicp_irq_domain_alloc() local90 spin_lock(&gicp->spi_lock); in gicp_irq_domain_alloc()91 hwirq = find_first_zero_bit(gicp->spi_bitmap, gicp->spi_cnt); in gicp_irq_domain_alloc()[all …]
4 $id: http://devicetree.org/schemas/interrupt-controller/marvell,ap806-gicp.yaml#7 title: Marvell GICP Controller13 GICP is a Marvell extension of the GIC that allows to trigger GIC SPI20 const: marvell,ap806-gicp26 description: Tuples of GIC SPI interrupt ranges available for this GICP46 compatible = "marvell,ap806-gicp";
151 gicp: gicp@3f0040 { label152 compatible = "marvell,ap806-gicp";