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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/
H A Darm,gic-v5.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v5.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lpieralisi@kernel.org>
11 - Marc Zyngier <maz@kernel.org>
21 - one or more IRS (Interrupt Routing Service)
22 - zero or more ITS (Interrupt Translation Service)
25 - PE-Private Peripheral Interrupts (PPI)
26 - Shared Peripheral Interrupts (SPI)
[all …]
H A Darm,gic-v5-iwb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v5-iwb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lpieralisi@kernel.org>
11 - Marc Zyngier <maz@kernel.org>
24 - $ref: /schemas/interrupt-controller.yaml#
28 const: arm,gic-v5-iwb
32 - description: IWB control frame
34 "#address-cells":
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1012a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
23 rtic-a = &rtic_a;
[all …]
H A Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
[all …]
H A Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
37 #address-cells = <1>;
[all …]
H A Dfsl-ls1088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
26 #address-cells = <1>;
[all …]
H A Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
[all …]
H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
[all …]
H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/ls/
H A Dls1021a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
12 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a7";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/crypto/
H A Dfsl,sec-v4.0-mon.yaml1 # SPDX-License-Identifier: GPL-2.0
2 # Copyright (C) 2008-2011 Freescale Semiconductor Inc.
4 ---
5 $id: http://devicetree.org/schemas/crypto/fsl,sec-v4.0-mon.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Freescale Secure Non-Volatile Storage (SNVS)
11 - '"Horia Geantă" <horia.geanta@nxp.com>'
12 - Pankaj Gupta <pankaj.gupta@nxp.com>
13 - Gaurav Jain <gaurav.jain@nxp.com>
23 - items:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dsamsung,s5p-mfc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/samsung,s5p-mf
[all...]
/freebsd/sys/contrib/device-tree/Bindings/interconnect/
H A Dqcom,msm8998-bwmon.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interconnect/qcom,msm8998-bwmon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
17 - Measuring the bandwidth between CPUs and Last Level Cache Controller -
19 - Measuring the bandwidth between Last Level Cache Controller and memory
20 (DDR) - called LLCC BWMON.
25 - const: qcom,msm8998-bwmon # BWMON v4
26 - items:
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bjorn Andersson <andersson@kernel.org>
11 - Konrad Dybcio <konradybcio@kernel.org>
20 - enum:
21 - qcom,sdhci-msm-v4
23 - items:
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Damlogic-c3-c308l-aw419.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "amlogic-c3.dtsi"
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
27 reserved-memory {
28 #address-cells = <2>;
29 #size-cells = <2>;
34 compatible = "shared-dma-pool";
[all …]
H A Damlogic-c3-c302x-aw409.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "amlogic-c3.dtsi"
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
15 #size-cells = <2>;
27 reserved-memory {
28 #address-cells = <2>;
29 #size-cells = <2>;
34 compatible = "shared-dma-pool";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dipq5018.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
8 #include <dt-bindings/clock/qcom,apss-ipq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
11 #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
14 interrupt-parent = <&intc>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 sleep_clk: sleep-clk {
20 compatible = "fixed-clock";
[all …]
H A Dipq5332.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
8 #include <dt-bindings/clock/qcom,apss-ipq.h>
9 #include <dt-bindings/clock/qcom,ipq5332-gcc.h>
10 #include <dt-bindings/interconnect/qcom,ipq5332.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&intc>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 sleep_clk: sleep-clk {
[all …]
H A Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
12 #include <dt-bindings/thermal/thermal.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&intc>;
20 sleep_clk: sleep-clk {
[all …]
H A Dsm6125.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,dispcc-sm6125.h>
7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
8 #include <dt-bindings/clock/qcom,gcc-sm6125.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
16 interrupt-parent = <&intc>;
[all …]
H A Dipq9574.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
9 #include <dt-bindings/clock/qcom,apss-ipq.h>
10 #include <dt-bindings/clock/qcom,ipq-cmn-pll.h>
11 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
12 #include <dt-bindings/interconnect/qcom,ipq9574.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
15 #include <dt-bindings/thermal/thermal.h>
[all …]
H A Dipq8074.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
15 interrupt-parent = <&intc>;
19 compatible = "fixed-clock";
20 clock-frequency = <32768>;
21 #clock-cells = <0>;
25 compatible = "fixed-clock";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-ipq4019.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 interrupt-parent = <&intc>;
20 reserved-memory {
21 #address-cells = <0x1>;
[all …]

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