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/linux/Documentation/devicetree/bindings/clock/
H A Dmvebu-gated-clock.txt7 corresponding clock gating control bit in HW to ease manual clock
177 "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating
178 "marvell,armada-375-gating-clock" - for Armada 375 SoC clock gating
179 "marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating
180 "marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating
181 "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating
182 "marvell,mv98dx3236-gating-clock" - for 98dx3236 SoC clock gating
183 "marvell,dove-gating-clock" - for Dove SoC clock gating
184 "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating
185 - reg : shall be the register address of the Clock Gating Control register
[all …]
H A Dimx8qxp-lpcg.yaml7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock
17 This level of clock gating is provided after the clocks are generated
/linux/drivers/clk/qcom/
H A Dclk-branch.h13 * struct clk_branch - gating clock with status bit and dynamic hardware gating
15 * @hwcg_reg: dynamic hardware clock gating register
16 * @hwcg_bit: ORed with @hwcg_reg to enable dynamic hardware clock gating
42 * struct clk_mem_branch - gating clock which are associated with memories
44 * @mem_enable_reg: branch clock memory gating register
47 * @branch: branch clock gating handle
/linux/sound/soc/intel/catpt/
H A Ddsp.c169 /* wait for SRAM power gating to propagate */ in catpt_dsp_set_srampge()
207 /* disable core clock gating */ in catpt_dsp_update_srampge()
212 /* enable core clock gating */ in catpt_dsp_update_srampge()
361 /* disable core clock gating */ in catpt_dsp_power_down()
374 /* switch clock gating */ in catpt_dsp_power_down()
382 /* SRAM power gating all */ in catpt_dsp_power_down()
394 /* enable core clock gating */ in catpt_dsp_power_down()
406 /* disable core clock gating */ in catpt_dsp_power_up()
409 /* switch clock gating */ in catpt_dsp_power_up()
416 /* SRAM power gating none */ in catpt_dsp_power_up()
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/linux/drivers/clk/bcm/
H A Dclk-kona.h98 * Gating control and status is managed by a 32-bit gate register.
100 * There are several types of gating available:
103 * - hardware-only gating (auto-gating)
108 * - software-only gating
109 * Auto-gating is not available for this type of clock.
113 * To ensure a change to the gating status is complete, the
116 * - selectable hardware or software gating
117 * Gating for this type of clock can be configured to be either
125 u32 hw_sw_sel_bit; /* 0: hardware gating; 1: software gating */
/linux/drivers/soc/tegra/
H A Dflowctrl.c84 /* pwr gating on wfe */ in flowctrl_cpu_suspend_enter()
99 * power-gating (like memory running off PLLP), in flowctrl_cpu_suspend_enter()
103 * while wfe for the power-gating, just like it in flowctrl_cpu_suspend_enter()
108 /* pwr gating on wfi */ in flowctrl_cpu_suspend_enter()
115 reg |= FLOW_CTRL_CSR_ENABLE; /* pwr gating */ in flowctrl_cpu_suspend_enter()
/linux/drivers/accel/amdxdna/
H A Dnpu4_regs.c66 { 1, 1, AIE2_RT_CFG_CLK_GATING }, /* Clock gating on */
67 { 2, 1, AIE2_RT_CFG_CLK_GATING }, /* Clock gating on */
68 { 3, 1, AIE2_RT_CFG_CLK_GATING }, /* Clock gating on */
69 { 4, 1, AIE2_RT_CFG_CLK_GATING }, /* Clock gating on */
/linux/drivers/pmdomain/st/
H A Dste-ux500-pm-domain.c23 * Handle the gating of the PM domain regulator here. in pd_power_off()
27 * callbacks, to be able to enable PM domain gating/ungating. in pd_power_off()
39 * callbacks, to be able to enable PM domain gating/ungating. in pd_power_on()
/linux/drivers/gpu/drm/gma500/
H A Dpsb_device.c89 u32 gating = PSB_RSGX32(PSB_CR_CLKGATECTL); in psb_init_pm() local
90 gating &= ~3; /* Disable 2D clock gating */ in psb_init_pm()
91 gating |= 1; in psb_init_pm()
92 PSB_WSGX32(gating, PSB_CR_CLKGATECTL); in psb_init_pm()
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v4_0_5.c579 * vcn_v4_0_5_disable_static_power_gating - disable VCN static power gating
583 * Disable static power gating for VCN block
639 * vcn_v4_0_5_enable_static_power_gating - enable VCN static power gating
643 * Enable static power gating for VCN block
682 * vcn_v4_0_5_disable_clock_gating - disable VCN clock gating
686 * Disable clock gating for VCN block
794 * vcn_v4_0_5_disable_clock_gating_dpg_mode - disable VCN clock gating dpg mode
800 * Disable clock gating for VCN block with dpg mode
813 /* enable sw clock gating control */ in vcn_v4_0_5_disable_clock_gating_dpg_mode()
839 /* turn off clock gating */ in vcn_v4_0_5_disable_clock_gating_dpg_mode()
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H A Dvcn_v4_0.c623 * vcn_v4_0_disable_static_power_gating - disable VCN static power gating
627 * Disable static power gating for VCN block
689 * vcn_v4_0_enable_static_power_gating - enable VCN static power gating
693 * Enable static power gating for VCN block
745 * vcn_v4_0_disable_clock_gating - disable VCN clock gating
749 * Disable clock gating for VCN block
857 * vcn_v4_0_disable_clock_gating_dpg_mode - disable VCN clock gating dpg mode
863 * Disable clock gating for VCN block with dpg mode
876 /* enable sw clock gating control */ in vcn_v4_0_disable_clock_gating_dpg_mode()
902 /* turn off clock gating */ in vcn_v4_0_disable_clock_gating_dpg_mode()
[all …]
H A Dvcn_v5_0_0.c543 * vcn_v5_0_0_disable_static_power_gating - disable VCN static power gating
547 * Disable static power gating for VCN block
611 * vcn_v5_0_0_enable_static_power_gating - enable VCN static power gating
615 * Enable static power gating for VCN block
658 * vcn_v5_0_0_disable_clock_gating - disable VCN clock gating
662 * Disable clock gating for VCN block
671 * vcn_v5_0_0_disable_clock_gating_dpg_mode - disable VCN clock gating dpg mode
677 * Disable clock gating for VCN block with dpg mode
688 * vcn_v5_0_0_enable_clock_gating - enable VCN clock gating
692 * Enable clock gating for VCN block
[all …]
H A Dvcn_v4_0_3.c640 * vcn_v4_0_3_disable_clock_gating - disable VCN clock gating
644 * Disable clock gating for VCN block
734 * vcn_v4_0_3_disable_clock_gating_dpg_mode - disable VCN clock gating dpg mode
740 * Disable clock gating for VCN block with dpg mode
753 /* enable sw clock gating control */ in vcn_v4_0_3_disable_clock_gating_dpg_mode()
773 /* turn off clock gating */ in vcn_v4_0_3_disable_clock_gating_dpg_mode()
777 /* turn on SUVD clock gating */ in vcn_v4_0_3_disable_clock_gating_dpg_mode()
787 * vcn_v4_0_3_enable_clock_gating - enable VCN clock gating
791 * Enable clock gating for VCN block
861 /* enable dynamic power gating mode */ in vcn_v4_0_3_start_dpg_mode()
[all …]
/linux/drivers/gpu/drm/meson/
H A Dmeson_dw_mipi_dsi.h36 * 0=Default, use auto-clock gating to save power;
37 * 1=use free-run clock, disable auto-clock gating, for debug mode.
39 * have auto-clock gating. 1=Enable pixclk. Default 0.
41 * have auto-clock gating. 1=Enable sysclk. Default 0.
/linux/drivers/platform/x86/intel/pmc/
H A DKconfig22 - PCH IP Power Gating status
24 - MPHY/PLL gating status (Sunrisepoint PCH only)
/linux/sound/pci/hda/
H A Dhda_jack.c207 /* A gating jack indicates the jack is invalid if gating is unplugged */ in jack_detect_update()
376 * snd_hda_jack_set_gating_jack - Set gating jack.
379 * @gating_nid: gating pin NID
381 * Indicates the gated jack is only valid when the gating jack is plugged.
387 struct hda_jack_tbl *gating = in snd_hda_jack_set_gating_jack() local
392 if (!gated || !gating) in snd_hda_jack_set_gating_jack()
396 gating->gated_jack = gated_nid; in snd_hda_jack_set_gating_jack()
481 * to make sure that all gating jacks properly have been set in snd_hda_jack_report_sync()
/linux/include/ufs/
H A Dufshcd.h391 /* clock gating state */
400 * struct ufs_clk_gating - UFS clock gating related info
405 * @clk_gating_workq: workqueue for clock gating work.
409 * @delay_ms: gating delay in ms
410 * @is_suspended: clk gating is suspended when set to 1 which can be used
413 * @enable_attr: sysfs attribute to enable/disable clock gating
414 * @is_enabled: Indicates the current status of clock gating
415 * @is_initialized: Indicates whether clock gating is initialized or not
417 * completion before gating clocks.
695 /* Allow dynamic clk gating */
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/linux/sound/soc/sof/intel/
H A Dhda-ctrl.c159 * enable/disable audio dsp clock gating and power gating bits.
168 /* enable/disable audio dsp clock gating */ in hda_dsp_ctrl_clock_power_gating()
178 /* enable/disable audio dsp power gating */ in hda_dsp_ctrl_clock_power_gating()
H A Dhda-ipc.h43 /* Prevent clock gating (0 - cg allowed, 1 - DSP clock always on) */
45 /* Prevent power gating (0 - deep power state transitions allowed) */
/linux/drivers/media/dvb-frontends/
H A Ddib3000mc.h48 int gating);
69 int gating) in dib3000mc_get_tuner_i2c_master() argument
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Drockchip,rk3399-dmc.yaml79 Defines the memory self-refresh and controller clock gating idle period.
81 arg gating started if bus is idle for sr_mc_gate_idle*1024 DFI clock
300 Defines the memory self-refresh and controller clock gating idle period in nanoseconds.
302 arg gating started if bus is idle for sr_mc_gate_idle nanoseconds.
330 Defines the self-refresh and memory-controller clock gating disable
/linux/drivers/gpu/drm/amd/display/dc/core/
H A Ddc_vm_helper.c45 /* Pre-init system aperture start/end for all HUBP instances (if not gating?) in dc_setup_system_context()
46 * or cache system aperture if using power gating in dc_setup_system_context()
/linux/sound/soc/intel/avs/
H A Dptl.c41 /* Prevent power gating of DSP domain. */ in avs_ptl_core_power_on()
59 /* Allow power gating of DSP domain. No STS polling as HOST is only one of its users. */ in avs_ptl_core_power_off()
/linux/drivers/misc/mei/
H A Dmei_dev.h340 * @pg_state : power gating state of the device
342 * @pg_is_enabled : is power gating enabled
411 * enum mei_pg_event - power gating transition events
413 * @MEI_PG_EVENT_IDLE: the driver is not in power gating transition
428 * enum mei_pg_state - device internal power gating state
501 * @pg_event : power gating event
593 * Power Gating support
/linux/arch/arm/mach-socfpga/
H A Dself-refresh.S48 /* Enable dynamic clock gating in the Power Control Register. */
115 /* Disable dynamic clock gating in the Power Control Register. */

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