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/linux/drivers/pinctrl/meson/
H A Dpinctrl-amlogic-t7.c1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
9 #include <dt-bindings/gpio/amlogic,t7-periphs-pinctrl.h>
10 #include "pinctrl-meson.h"
11 #include "pinctrl-meson-axg-pmx.h"
708 GROUP(emmc_nand_d0, 1),
709 GROUP(emmc_nand_d1, 1),
710 GROUP(emmc_nand_d2, 1),
711 GROUP(emmc_nand_d3, 1),
712 GROUP(emmc_nand_d4, 1),
713 GROUP(emmc_nand_d5, 1),
[all …]
H A Dpinctrl-meson-s4.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/meson-s4-gpio.h>
10 #include "pinctrl-meson.h"
11 #include "pinctrl-meson-axg-pmx.h"
506 GROUP(i2c0_sda, 1),
507 GROUP(i2c0_scl, 1),
510 GROUP(uart_b_tx_e, 2),
511 GROUP(uart_b_rx_e, 2),
514 GROUP(pwm_h, 3),
515 GROUP(pwm_j, 3),
[all …]
H A Dpinctrl-meson-g12a.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 #include <dt-bindings/gpio/meson-g12a-gpio.h>
11 #include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h>
12 #include "pinctrl-meson.h"
13 #include "pinctrl-meson-axg-pmx.h"
527 GROUP(emmc_nand_d0, 1),
528 GROUP(emmc_nand_d1, 1),
529 GROUP(emmc_nand_d2, 1),
530 GROUP(emmc_nand_d3, 1),
531 GROUP(emmc_nand_d4, 1),
[all …]
H A Dpinctrl-meson-a1.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/meson-a1-gpio.h>
10 #include "pinctrl-meson.h"
11 #include "pinctrl-meson-axg-pmx.h"
407 GROUP(psram_clkn, 1),
408 GROUP(psram_clkp, 1),
409 GROUP(psram_ce_n, 1),
410 GROUP(psram_rst_n, 1),
411 GROUP(psram_adq0, 1),
412 GROUP(psram_adq1, 1),
[all …]
H A Dpinctrl-meson-axg.c1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include <dt-bindings/gpio/meson-axg-gpio.h>
10 #include "pinctrl-meson.h"
11 #include "pinctrl-meson-axg-pmx.h"
448 GROUP(emmc_nand_d0, 1),
449 GROUP(emmc_nand_d1, 1),
450 GROUP(emmc_nand_d2, 1),
451 GROUP(emmc_nand_d3, 1),
452 GROUP(emmc_nand_d4, 1),
453 GROUP(emmc_nand_d5, 1),
[all …]
H A Dpinctrl-amlogic-c3.c1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
9 #include <dt-bindings/gpio/amlogic-c3-gpio.h>
10 #include "pinctrl-meson.h"
11 #include "pinctrl-meson-axg-pmx.h"
436 GROUP(pwm_a, 1),
437 GROUP(pwm_b, 1),
438 GROUP(i2c2_sda, 1),
439 GROUP(i2c2_scl, 1),
440 GROUP(gen_clk_e, 1),
443 GROUP(i2c0_sda_e, 2),
[all …]
H A Dpinctrl-meson8b.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/gpio/meson8b-gpio.h>
10 #include "pinctrl-meson.h"
11 #include "pinctrl-meson8-pmx.h"
444 GROUP(sd_d0_a, 8, 5),
445 GROUP(sd_d1_a, 8, 4),
446 GROUP(sd_d2_a, 8, 3),
447 GROUP(sd_d3_a, 8, 2),
448 GROUP(sdxc_d0_0_a, 5, 29),
449 GROUP(sdxc_d47_a, 5, 12),
[all …]
H A Dpinctrl-meson-gxbb.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
10 #include "pinctrl-meson.h"
11 #include "pinctrl-meson8-pmx.h"
440 GROUP(sdio_d0, 8, 5),
441 GROUP(sdio_d1, 8, 4),
442 GROUP(sdio_d2, 8, 3),
443 GROUP(sdio_d3, 8, 2),
444 GROUP(sdio_cmd, 8, 1),
445 GROUP(sdio_clk, 8, 0),
[all …]
H A Dpinctrl-meson-gxl.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/gpio/meson-gxl-gpio.h>
10 #include "pinctrl-meson.h"
11 #include "pinctrl-meson8-pmx.h"
414 GROUP(sdio_d0, 5, 31),
415 GROUP(sdio_d1, 5, 30),
416 GROUP(sdio_d2, 5, 29),
417 GROUP(sdio_d3, 5, 28),
418 GROUP(sdio_clk, 5, 27),
419 GROUP(sdio_cmd, 5, 26),
[all …]
H A Dpinctrl-meson8.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/gpio/meson8-gpio.h>
9 #include "pinctrl-meson.h"
10 #include "pinctrl-meson8-pmx.h"
531 GROUP(sd_d0_a, 8, 5),
532 GROUP(sd_d1_a, 8, 4),
533 GROUP(sd_d2_a, 8, 3),
534 GROUP(sd_d3_a, 8, 2),
535 GROUP(sd_clk_a, 8, 1),
536 GROUP(sd_cmd_a, 8, 0),
[all …]
H A Dpinctrl-meson.h1 /* SPDX-License-Identifier: GPL-2.0-only */
20 * struct meson_pmx_group - a pinmux group
22 * @name: group name
23 * @pins: pins in the group
24 * @num_pins: number of pins in the group
25 * @is_gpio: whether the group is a single GPIO group
26 * @reg: register offset for the group in the domain mux registers
27 * @bit bit index enabling the group
28 * @domain: index of the domain this group belongs to
38 * struct meson_pmx_func - a pinmux function
[all …]
/linux/drivers/pinctrl/
H A Dpinctrl-zynqmp.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
19 #include <linux/firmware/xlnx-zynqmp.h>
21 #include <linux/pinctrl/pinconf-generic.h>
27 #include "pinctrl-utils.h"
48 * struct zynqmp_pmux_function - a pinmux function
49 * @name: Name of the pin mux function
50 * @groups: List of pin groups for this function
52 * @node: Firmware node matching with the function
54 * This structure holds information about pin control function
[all …]
H A Dpinmux.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 ST-Ericsson SA
6 * Written on behalf of Linaro for ST-Ericsson
23 #include <linux/radix-tree.h>
37 const struct pinmux_ops *ops = pctldev->desc->pmxops; in pinmux_check_ops()
43 !ops->get_functions_count || in pinmux_check_ops()
44 !ops->get_function_name || in pinmux_check_ops()
45 !ops->get_function_groups || in pinmux_check_ops()
46 !ops->set_mux) { in pinmux_check_ops()
47 dev_err(pctldev->dev, "pinmux ops lacks necessary functions\n"); in pinmux_check_ops()
[all …]
/linux/drivers/pinctrl/aspeed/
H A Dpinmux-aspeed.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 * functions. The SoC function enabled on a pin is determined on a priority
16 * bits. Some difficulty arises as the pin's function bit masks for each
21 * read-only).
23 * SoC Multi-function Pin Expression Examples
24 * ------------------------------------------
30 * D6 is a pin with a single function (beside GPIO); a high priority signal
31 * that participates in one function:
34 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
36 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
[all …]
/linux/Documentation/trace/
H A Dboottime-trace.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Boot-time tracing
12 Boot-time tracing allows users to trace boot-time process including
13 device initialization with full features of ftrace including per-event
14 filter and actions, histograms, kprobe-events and synthetic-events,
27 .. [1] See :ref:`Documentation/admin-guide/bootconfig.rst <bootconfig>`
28 .. [2] See :ref:`Documentation/admin-guide/kernel-parameters.rst <kernelparameters>`
31 ---------------------
37 Output trace-event data on printk buffer too.
50 Add fgraph tracing function filters.
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dfsl,mxs-pinctrl.txt5 function is GPIO. The configuration on the pins includes drive strength,
6 voltage and pull-up.
9 - compatible: "fsl,imx23-pinctrl" or "fsl,imx28-pinctrl"
10 - reg: Should contain the register physical address and length for the
13 Please refer to pinctrl-bindings.txt in this directory for details of the
18 a group of pins, and only affects those parameters that are explicitly listed.
20 information about pull-up. For this reason, even seemingly boolean values are
26 One is to set up a group of pins for a function, both mux selection and pin
27 configurations, and it's called group node in the binding document. The other
29 different configuration than what is defined in group node. The binding
[all …]
H A Dpinctrl-sirf.txt4 - compatible : "sirf,prima2-pinctrl"
5 - reg : Address range of the pinctrl registers
6 - interrupts : Interrupts used by every GPIO group
7 - gpio-controller : Indicates this device is a GPIO controller
8 - interrupt-controller : Marks the device node as an interrupt controller
10 - sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m
11 - sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m
13 Please refer to pinctrl-bindings.txt in this directory for details of the common
17 Each of these subnodes represents some desired configuration for a group of pins.
19 Required subnode-properties:
[all …]
H A Dlantiq,pinctrl-falcon.txt4 - compatible: "lantiq,pinctrl-falcon"
5 - reg: Should contain the physical address and length of the gpio/pinmux
8 Please refer to pinctrl-bindings.txt in this directory for details of the
14 pin, a group, or a list of pins or groups. This configuration can include the
15 mux function to select on those group(s), and two pin configuration parameters:
16 pull-up and open-drain
22 other words, a subnode that lists a mux function but no pin configuration
25 information about e.g. the mux function.
29 Definition of mux function groups:
31 Required subnode-properties:
[all …]
/linux/arch/arc/boot/dts/
H A Dabilis_tb101.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
32 abilis,function = "mis0";
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
[all …]
H A Dabilis_tb100.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
32 abilis,function = "mis0";
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
[all …]
/linux/drivers/pinctrl/spear/
H A Dpinctrl-spear.c8 * - U300 Pinctl drivers
9 * - Tegra Pinctl drivers
29 #include "pinctrl-spear.h"
31 #define DRIVER_NAME "spear-pinmux"
42 val = pmx_readl(pmx, muxreg->reg); in muxregs_endisable()
43 val &= ~muxreg->mask; in muxregs_endisable()
46 temp = muxreg->val; in muxregs_endisable()
48 temp = ~muxreg->val; in muxregs_endisable()
50 val |= muxreg->mask & temp; in muxregs_endisable()
51 pmx_writel(pmx, val, muxreg->reg); in muxregs_endisable()
[all …]
/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2011-2012, NVIDIA CORPORATION. All rights reserved.
10 * Copyright (C) 2009-2011 ST-Ericsson AB
27 #include "../pinctrl-utils.h"
28 #include "pinctrl-tegra.h"
32 return readl(pmx->regs[bank] + reg); in pmx_readl()
37 writel_relaxed(val, pmx->regs[bank] + reg); in pmx_writel()
46 return pmx->soc->ngroups; in tegra_pinctrl_get_groups_count()
50 unsigned group) in tegra_pinctrl_get_group_name() argument
54 return pmx->soc->groups[group].name; in tegra_pinctrl_get_group_name()
[all …]
/linux/Documentation/driver-api/
H A Dpin-control.rst9 - Enumerating and naming controllable pins
11 - Multiplexing of pins, pads, fingers (etc) see below for details
13 - Configuration of pins, pads, fingers (etc), such as software-controlled
14 biasing and driving mode specific pins, such as pull-up, pull-down, open drain,
17 Top-level interface
22 - A PIN CONTROLLER is a piece of hardware, usually a set of registers, that
26 - PINS are equal to pads, fingers, balls or whatever packaging input or
30 be sparse - i.e. there may be gaps in the space with numbers where no
60 .. code-block:: c
97 See ``arch/arm/mach-ux500/Kconfig`` for an example.
[all …]
/linux/drivers/pinctrl/berlin/
H A Dberlin.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014 Marvell Technology Group Ltd.
7 * Antoine Ténart <antoine.tenart@free-electrons.com>
23 #include "../pinctrl-utils.h"
39 return pctrl->desc->ngroups; in berlin_pinctrl_get_group_count()
43 unsigned group) in berlin_pinctrl_get_group_name() argument
47 return pctrl->desc->groups[group].name; in berlin_pinctrl_get_group_name()
64 ret = of_property_read_string(node, "function", &function_name); in berlin_pinctrl_dt_node_to_map()
66 dev_err(pctrl->dev, in berlin_pinctrl_dt_node_to_map()
67 "missing function property in node %pOFn\n", node); in berlin_pinctrl_dt_node_to_map()
[all …]
/linux/include/linux/mmc/
H A Dsd.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2005-2007 Pierre Ossman, All Rights Reserved.
47 * [23:20] Function group 6
48 * [19:16] Function group 5
49 * [15:12] Function group 4
50 * [11:8] Function group 3
51 * [7:4] Function group 2
52 * [3:0] Function group 1
67 #define SCR_SPEC_VER_0 0 /* Implements system specification 1.0 - 1.01 */
69 #define SCR_SPEC_VER_2 2 /* Implements system specification 2.00-3.0X */
[all …]

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