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/linux/Documentation/devicetree/bindings/timer/
H A Dfsl,ftm-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/fsl,ftm-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale FlexTimer Module (FTM) Timer
10 - Animesh Agarwal <animeshagarwal28@gmail.com>
14 const: fsl,ftm-timer
18 - description: clock event device
19 - description: clock source device
25 description: The clocks provided by the SoC to drive the timer, must
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/linux/drivers/clocksource/
H A Dtimer-fsl-ftm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale FlexTimer Module (FTM) timer driver.
18 #include <linux/fsl/ftm.h>
34 if (priv->big_endian) in ftm_readl()
42 if (priv->big_endian) in ftm_writel()
55 val |= priv->ps | FTM_SC_CLK(1); in ftm_counter_enable()
99 * The CNT register contains the FTM counter value. in ftm_reset_counter()
108 return ftm_readl(priv->clksrc_base + FTM_CNT); in ftm_read_sched_clock()
121 ftm_counter_disable(priv->clkevt_base); in ftm_set_next_event()
123 /* Force the value of CNTIN to be loaded into the FTM counter */ in ftm_set_next_event()
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/linux/drivers/counter/
H A Dftm-quaddec.c1 // SPDX-License-Identifier: GPL-2.0
3 * Flex Timer Module Quadrature decoder
5 * This module implements a driver for decoding the FTM quadrature
9 #include <linux/fsl/ftm.h>
19 #define FTM_FIELD_UPDATE(ftm, offset, mask, val) \ argument
22 ftm_read(ftm, offset, &flags); \
25 ftm_write(ftm, offset, flags); \
35 static void ftm_read(struct ftm_quaddec *ftm, uint32_t offset, uint32_t *data) in ftm_read() argument
37 if (ftm->big_endian) in ftm_read()
38 *data = ioread32be(ftm->ftm_base + offset); in ftm_read()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
6 obj-$(CONFIG_COUNTER) += counter.o
7 counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
9 obj-$(CONFIG_I8254) += i8254.o
10 obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
11 obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
12 obj-$(CONFIG_RZ_MTU3_CNT) += rz-mtu3-cnt.o
13 obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
14 obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
15 obj-$(CONFIG_TI_EQEP) += ti-eqep.o
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 Interval Timer (PIT). The Intel 825x family of chips was first
31 tristate "ACCES 104-QUAD-8 driver"
37 Say yes here to build support for the ACCES 104-QUAD-8 quadrature
38 encoder counter/interface device family (104-QUAD-8, 104-QUAD-4).
41 operation on the respective count value attribute. The 104-QUAD-8
50 tristate "Flex Timer Module Quadrature decoder driver"
54 Select this option to enable the Flex Timer Quadrature decoder
58 module will be called ftm-quaddec.
69 will be called intel-qep.
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/linux/net/wireless/
H A Dcore.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>
6 * Copyright 2013-2014 Intel Mobile Communications GmbH
7 * Copyright 2015-2017 Intel Deutschland GmbH
8 * Copyright (C) 2018-2025 Intel Corporation
31 #include "wext-compat.h"
32 #include "rdev-ops.h"
45 /* RCU-protected (and RTNL for writers) */
67 if (rdev->wiphy_idx == wiphy_idx) { in cfg80211_rdev_by_wiphy_idx()
80 return rdev->wiphy_idx; in get_wiphy_idx()
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/linux/drivers/pwm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Pulse-Width Modulation (PWM) Support"
5 Generic Pulse-Width Modulation (PWM) support.
7 In Pulse-Width Modulation, a variation of the width of pulses
57 will be called pwm-ab8500.
74 will be called pwm-airoha.
86 will be called pwm-apple.
95 will be called pwm-argon-fan-hat.
105 will be called pwm-atmel.
113 (Atmel High-end LCD Controller). This PWM output is mainly used
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/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <1>;
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H A Dfsl-ls1012a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1012A family SoC.
6 * Copyright 2019-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
23 rtic-a = &rtic_a;
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H A Dfsl-ls1088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1088A family SoC.
5 * Copyright 2017-2020 NXP
10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
26 #address-cells = <1>;
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H A Dfsl-ls208xa.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
6 * Copyright 2017-2020 NXP
12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
32 #address-cells = <1>;
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H A Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
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H A Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
14 #include <dt-bindings/gpio/gpio.h>
18 interrupt-parent = <&gic>;
19 #address-cells = <2>;
20 #size-cells = <2>;
37 #address-cells = <1>;
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H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
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/linux/include/net/
H A Dcfg80211.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>
8 * Copyright 2013-2014 Intel Mobile Communications GmbH
9 * Copyright 2015-2017 Intel Deutschland GmbH
10 * Copyright (C) 2018-2025 Intel Corporation
72 * enum ieee80211_channel_flags - channel flags
167 * struct ieee80211_channel - channel definition
174 * @hw_value: hardware-specific value for the channel
212 * enum ieee80211_rate_flags - rate flags
245 * enum ieee80211_bss_type - BSS type filter
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/linux/drivers/clk/imx/
H A Dclk-vf610.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012-2013 Freescale Semiconductor, Inc.
10 #include <dt-bindings/clock/vf610-clock.h>
96 /* FTM counter clock source, not module clock */
203 np = of_find_compatible_node(NULL, NULL, "fsl,vf610-anatop"); in vf610_clocks_init()
350 * ftm_ext_clk and ftm_fix_clk are FTM timer counter's in vf610_clocks_init()
368 /* ftm(n)_clk are FTM module operation clock */ in vf610_clocks_init()
444 clk[VF610_CLK_SNVS] = imx_clk_gate2("snvs-rtc", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(7)); in vf610_clocks_init()
476 CLK_OF_DECLARE(vf610, "fsl,vf610-ccm", vf610_clocks_init);
/linux/drivers/rtc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
141 once-per-second update interrupts, used for synchronization.
159 will be called rtc-test.
173 will be called rtc-88pm860x.
183 will be called rtc-88pm80x.
193 will be called rtc-88pm886.
197 tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3"
200 AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip.
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/linux/drivers/net/wireless/virtual/
H A Dmac80211_hwsim.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * mac80211_hwsim - software simulator of 802.11 radio(s) for mac80211
6 * Copyright (c) 2016 - 2017 Intel Deutschland GmbH
7 * Copyright (C) 2018 - 2025 Intel Corporation
12 * - Add TSF sync and fix IBSS beacon transmission by adding
14 * - RX filtering based on filter configuration (data->rx_filter)
66 MODULE_PARM_DESC(support_p2p_device, "Support P2P-Device interface type");
77 * enum hwsim_regtest - the type of regulatory tests we offer
92 * this by using a custom beacon-capable regulatory domain for the first
110 * non-strict settings using the second driver regulatory request. All
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/imx7-reset.h>
12 #include "imx7d-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <1>;
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/linux/include/uapi/linux/
H A Dnl80211.h6 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>
13 * Copyright 2015-2017 Intel Deutschland GmbH
14 * Copyright (C) 2018-2025 Intel Corporation
32 * be careful not to break things - i.e. don't move anything around or so
74 * - a setup station entry is added, not yet authorized, without any rate
76 * - when the TDLS setup is done, a single NL80211_CMD_SET_STATION is valid
79 * - %NL80211_TDLS_ENABLE_LINK is then used
80 * - after this, the only valid operation is to remove it by tearing down
95 * Frame registration is done on a per-interface basis and registrations
137 * software, like the AP-VLAN type in mac80211 for example, there's
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/linux/drivers/isdn/hardware/mISDN/
H A DmISDNisar.c1 // SPDX-License-Identifier: GPL-2.0-only
41 u8 val = isar->read_reg(isar->hw, ISAR_HIA); in waitforHIA()
45 t--; in waitforHIA()
46 val = isar->read_reg(isar->hw, ISAR_HIA); in waitforHIA()
48 pr_debug("%s: HIA after %dus\n", isar->name, timeout - t); in waitforHIA()
54 * if msg is NULL use isar->buf
62 isar->write_reg(isar->hw, ISAR_CTRL_H, creg); in send_mbox()
63 isar->write_reg(isar->hw, ISAR_CTRL_L, len); in send_mbox()
64 isar->write_reg(isar->hw, ISAR_WADR, 0); in send_mbox()
66 msg = isar->buf; in send_mbox()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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