Searched +full:fsin +full:- +full:enable (Results 1 – 5 of 5) sorted by relevance
| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - ChiYuan Huang <cy_huang@richtek.com> 15 (Enable/Fail), Enable pin to turn chip on, and Fail pin as fault indication. 27 wakeup-source: true 32 enable-gpios: 33 description: A connection of the 'enable' gpio line. 36 richtek,ld-pulse-delay-us: [all …]
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| /linux/drivers/regulator/ |
| H A D | rtmv20-regulator.c | 1 // SPDX-License-Identifier: GPL-2.0+ 75 gpiod_set_value(priv->enable_gpio, 1); in rtmv20_lsw_enable() 80 /* HW re-enable, disable cache only and sync regcache here */ in rtmv20_lsw_enable() 81 regcache_cache_only(priv->regmap, false); in rtmv20_lsw_enable() 82 ret = regcache_sync(priv->regmap); in rtmv20_lsw_enable() 99 regcache_cache_only(priv->regmap, true); in rtmv20_lsw_disable() 100 regcache_mark_dirty(priv->regmap); in rtmv20_lsw_disable() 102 gpiod_set_value(priv->enable_gpio, 0); in rtmv20_lsw_disable() 113 return -EINVAL; in rtmv20_lsw_set_current_limit() 118 sel = (max_uA - RTMV20_LSW_MINUA) / RTMV20_LSW_STEPUA; in rtmv20_lsw_set_current_limit() [all …]
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| /linux/arch/m68k/ifpsp060/src/ |
| H A D | ftest.S | 3 M68000 Hi-Performance Microprocessor Division 5 Production Release P1.00 -- October 10, 1994 30 set SREGS, -64 31 set IREGS, -128 32 set IFPREGS, -224 33 set SFPREGS, -320 34 set IFPCREGS, -332 35 set SFPCREGS, -344 36 set ICCR, -346 37 set SCCR, -348 [all …]
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| H A D | fpsp.S | 3 M68000 Hi-Performance Microprocessor Division 5 Production Release P1.00 -- October 10, 1994 98 mov.l %d0,-(%sp) 99 mov.l (_060FPSP_TABLE-0x80+_off_done,%pc),%d0 100 pea.l (_060FPSP_TABLE-0x80,%pc,%d0) 106 mov.l %d0,-(%sp) 107 mov.l (_060FPSP_TABLE-0x80+_off_ovfl,%pc),%d0 108 pea.l (_060FPSP_TABLE-0x80,%pc,%d0) 114 mov.l %d0,-(%sp) 115 mov.l (_060FPSP_TABLE-0x80+_off_unfl,%pc),%d0 [all …]
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| H A D | pfpsp.S | 3 M68000 Hi-Performance Microprocessor Division 5 Production Release P1.00 -- October 10, 1994 97 mov.l %d0,-(%sp) 98 mov.l (_060FPSP_TABLE-0x80+_off_done,%pc),%d0 99 pea.l (_060FPSP_TABLE-0x80,%pc,%d0) 105 mov.l %d0,-(%sp) 106 mov.l (_060FPSP_TABLE-0x80+_off_ovfl,%pc),%d0 107 pea.l (_060FPSP_TABLE-0x80,%pc,%d0) 113 mov.l %d0,-(%sp) 114 mov.l (_060FPSP_TABLE-0x80+_off_unfl,%pc),%d0 [all …]
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