/freebsd/lib/libpmc/pmu-events/arch/x86/icelakex/ |
H A D | frontend.json | 3 …front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc… 9 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch… 15 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.", 23 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe… 29 "BriefDescription": "DSB-to-MITE switch true penalty cycles.", 35 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou… 50 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.", 65 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th… 116 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle", 125 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n… [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/icelake/ |
H A D | frontend.json | 3 …front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc… 9 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch… 15 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.", 23 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe… 29 "BriefDescription": "DSB-to-MITE switch true penalty cycles.", 35 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou… 50 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.", 65 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th… 116 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle", 125 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n… [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/tigerlake/ |
H A D | frontend.json | 3 …front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc… 9 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch… 14 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE transitions count.", 22 …"PublicDescription": "Counts the number of Decode Stream Buffer (DSB a.k.a. Uop Cache)-to-MITE spe… 27 "BriefDescription": "DSB-to-MITE switch true penalty cycles.", 33 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou… 47 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.", 62 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th… 113 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle", 122 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n… [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/ |
H A D | frontend.json | 9 …e number of prefixes in a 16B-line. This may result in a three-cycle penalty for each LCP (Length … 14 "BriefDescription": "DSB-to-MITE switch true penalty cycles.", 20 …"PublicDescription": "Decode Stream Buffer (DSB) is a Uop-cache that holds translations of previou… 34 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.", 49 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th… 100 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle", 109 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n… 115 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not … 124 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not … 130 …d after an interval where the front-end delivered no uops for a period of 16 cycles which was not … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylake/ |
H A D | frontend.json | 3 …front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc… 8 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch… 13 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches", 18 …e Decode Stream Buffer (DSB)-to-MITE switches including all misses because of missing Decode Strea… 23 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 28 …-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th… 41 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.", 55 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th… 101 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle", 109 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n… [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/cascadelakex/ |
H A D | frontend.json | 3 …front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc… 8 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch… 13 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches", 18 …e Decode Stream Buffer (DSB)-to-MITE switches including all misses because of missing Decode Strea… 23 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 28 …-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th… 41 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.", 55 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th… 101 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle", 109 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n… [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/skylakex/ |
H A D | frontend.json | 3 …front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc… 8 …"PublicDescription": "Counts the number of times the front-end is resteered when it finds a branch… 13 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches", 18 …e Decode Stream Buffer (DSB)-to-MITE switches including all misses because of missing Decode Strea… 23 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 28 …-to-MITE switch true penalty cycles. These cycles do not include uops routed through because of th… 41 …Instructions that experienced DSB (Decode stream buffer i.e. the decoded instruction-cache) miss.", 55 …e stream buffer i.e. the decoded instruction-cache) miss. Critical means stalls were exposed to th… 101 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle", 109 …ter an interval where the front-end delivered no uops for a period of at least 1 cycle which was n… [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/silvermont/ |
H A D | frontend.json | 7 …front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction… 16 …front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction… 25 …front end is resteered, mainly when the Branch Prediction Unit cannot provide a correct prediction… 66 …s entered into a ucode flow in the FEC. Includes inserted flows due to front-end detected faults … 70 …e most common case that this counts is when a micro-coded instruction is encountered by the front …
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H A D | pipeline.json | 108 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 117 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 127 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 137 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 147 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 157 …he processor predicts that the branch would be taken, but it is not, or vice-versa. When the misp… 207 … For instructions that consist of multiple micro-ops, this event counts exactly once, as the last … 216 … For instructions that consist of multiple micro-ops, this event counts the retirement of the last… 224 …front end of the machine is notified that it must restart, so no more instructions will be decoded… 229 "BriefDescription": "Self-Modifying Code detected", [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/goldmont/ |
H A D | pipeline.json | 263 …ocation is stalled waiting for a mispredicted jump to retire or other branch-like conditions (e.g.… 273 …ource in the backend. Including but not limited to resources such as the Re-order Buffer (ROB), r… 352 "BriefDescription": "Self-Modifying Code detected", 357 …ction and has to perform a machine clear because of that modification. Self-modifying code (SMC) … 362 "BriefDescription": "Uops issued to the back end per cycle", 367 …front end and allocated into the back end of the machine. This event counts uops that retire as w… 371 "BriefDescription": "Uops requested but not-delivered to the back-end per cycle", 376 …front-end inefficiencies. I.e. when front-end of the machine is not delivering uops to the back-en… 407 …ued by the micro-sequencer (MS). Counts both the uops from a micro-coded instruction, and the uop…
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/freebsd/lib/libpmc/pmu-events/arch/x86/goldmontplus/ |
H A D | pipeline.json | 284 "BriefDescription": "Instructions retired - using Reduced Skid PEBS feature", 312 …ocation is stalled waiting for a mispredicted jump to retire or other branch-like conditions (e.g.… 324 …ource in the backend. Including but not limited to resources such as the Re-order Buffer (ROB), r… 419 …r of times that the machines clears due to a page fault. Covers both I-side and D-side(Loads/Store… 424 "BriefDescription": "Self-Modifying Code detected", 431 …ction and has to perform a machine clear because of that modification. Self-modifying code (SMC) … 436 "BriefDescription": "Uops issued to the back end per cycle", 443 …front end and allocated into the back end of the machine. This event counts uops that retire as w… 447 "BriefDescription": "Uops requested but not-delivered to the back-end per cycle", 454 …front-end inefficiencies. I.e. when front-end of the machine is not delivering uops to the back-en… [all …]
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/freebsd/sys/contrib/ncsw/Peripherals/FM/Pcd/ |
H A D | fm_pcd_ipc.h | 2 * Copyright 2008-2012 Freescale Semiconductor Inc. 37 @Description FM PCD Inter-Partition prototypes, structures and definitions. 75 @Description Structure for port-PCD communication. 133 @Description Used by FM PCD front-end in order to allocate KG resources 142 @Description Used by FM PCD front-end in order to Free KG resources 151 @Description Used by FM PCD front-end in order to allocate Policer profiles 160 @Description Used by FM PCD front-end in order to Free Policer profiles 169 @Description Used by FM PCD front-end in order to allocate Policer profiles 179 @Description Used by FM PCD front-end in order to allocate Policer profiles 189 @Description Used by FM PCD front-end in order to get MURAM base address [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/alderlake/ |
H A D | frontend.json | 47 "BriefDescription": "DSB-to-MITE switch true penalty cycles.", 133 "BriefDescription": "Retired instructions after front-end starvation of at least 1 cycle", 148 … after an interval where the front-end delivered no uops for a period of 128 cycles which was not … 163 …d after an interval where the front-end delivered no uops for a period of 16 cycles which was not … 178 "BriefDescription": "Retired instructions after front-end starvation of at least 2 cycles", 193 … after an interval where the front-end delivered no uops for a period of 256 cycles which was not … 208 …ter an interval where the front-end had at least 1 bubble-slot for a period of 2 cycles which was … 223 …d after an interval where the front-end delivered no uops for a period of 32 cycles which was not … 238 …d after an interval where the front-end delivered no uops for a period of 4 cycles which was not i… 253 … after an interval where the front-end delivered no uops for a period of 512 cycles which was not … [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/haswell/ |
H A D | frontend.json | 3 …front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc… 8 "PublicDescription": "Number of front end re-steers due to BPU misprediction.", 13 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 31 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.", 40 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.", 170 …s event counts cycles during which the microcode sequencer assisted the Front-end in delivering uo… 232 …"PublicDescription": "This event counts uops delivered by the Front-end with the assistance of the… 243 …Front-end to the Resource Allocation Table (RAT) while the Back-end of the processor is not stalle… 255 …Front-end allocated exactly zero uops to the Resource Allocation Table (RAT) while the Back-end of… 283 "BriefDescription": "Cycles with less than 2 uops delivered by the front end.", [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/haswellx/ |
H A D | frontend.json | 3 …front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc… 8 "PublicDescription": "Number of front end re-steers due to BPU misprediction.", 13 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 31 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.", 40 … "BriefDescription": "Cycles where a code fetch is stalled due to L1 instruction-cache miss.", 170 …s event counts cycles during which the microcode sequencer assisted the Front-end in delivering uo… 232 …"PublicDescription": "This event counts uops delivered by the Front-end with the assistance of the… 243 …Front-end to the Resource Allocation Table (RAT) while the Back-end of the processor is not stalle… 255 …Front-end allocated exactly zero uops to the Resource Allocation Table (RAT) while the Back-end of… 283 "BriefDescription": "Cycles with less than 2 uops delivered by the front end.", [all …]
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/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/ |
H A D | DirectedGraph.h | 1 //===- llvm/ADT/DirectedGraph.h - Directed Graph ----------------*- C++ -*-===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 13 //===----------------------------------------------------------------------===// 105 const_iterator end() const { return Edges.end(); } in end() function 107 iterator end() { return Edges.end(); } in end() function 108 const EdgeType &front() const { return *Edges.front(); } in front() function 109 EdgeType &front() { return *Edges.front(); } in front() function 120 if (E->getTargetNode() == N) in findEdgesTo() 134 return (findEdgeTo(N) != Edges.end()); in hasEdgeTo() [all …]
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/freebsd/sys/contrib/ncsw/Peripherals/FM/ |
H A D | fm_ipc.h | 2 * Copyright 2008-2012 Freescale Semiconductor Inc. 37 @Description FM Inter-Partition prototypes, structures and definitions. 55 @Group FM_IPC_grp FM Inter-Partition messaging Unit 57 @Description FM Inter-Partition messaging unit API definitions and enums. 158 @Description Structure for port-FM communication during FM_PORT_Free. 266 /************************ FRONT-END-TO-BACK-END*****************************/ 272 @Description Used by FM front-end. 281 @Description Used by FM front-end. 290 @Description Used by FM front-end for the PORT module in order to set and get 300 @Description Used by FM front-end for the PORT module when a port is freed [all …]
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/freebsd/contrib/diff/doc/ |
H A D | fdl.texi | 10 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA 14 @end display 47 world-wide, royalty-free license, unlimited in duration, to use that 58 A ``Secondary Section'' is a named appendix or a front-matter section 78 as Front-Cover Texts or Back-Cover Texts, in the notice that says that 79 the Document is released under this License. A Front-Cover Text may 80 be at most 5 words, and a Back-Cover Text may be at most 25 words. 82 A ``Transparent'' copy of the Document means a machine-readable copy, 98 @acronym{DTD}, and standard-conforming simple @acronym{HTML}, 104 not generally available, and the machine-generated @acronym{HTML}, [all …]
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/freebsd/sys/contrib/xen/io/ |
H A D | ring.h | 4 * Shared producer-consumer ring macros. 33 * - standard integers types (uint8_t, uint16_t, etc) 38 * - size_t 39 * - memcpy 40 * - grant_ref_t 45 #include "../xen-compat.h" 55 /* Round a 32-bit unsigned constant down to the nearest power of two. */ 66 * power of two (so we can mask with (size-1) to loop around). 69 (__RD32(((_sz) - offsetof(struct _s##_sring, ring)) / \ 70 sizeof(((struct _s##_sring *)0)->ring[0]))) [all …]
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/freebsd/lib/libpmc/pmu-events/arch/x86/jaketown/ |
H A D | frontend.json | 3 …front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc… 12 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches.", 21 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 26 …-end cannot accept new micro-ops. The penalty for these switches is potentially several cycles o… 179 …front-end in delivering uops. Microcode assists are used for complex instructions or scenarios th… 248 …-end per cycle, per thread, when the back-end was not stalled. In the ideal case 4 uops can be de… 274 "BriefDescription": "Cycles when 1 or more uops were delivered to the by the front end.", 295 "BriefDescription": "Cycles with less than 2 uops delivered by the front end.", 305 "BriefDescription": "Cycles with less than 3 uops delivered by the front end.",
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/freebsd/lib/libpmc/pmu-events/arch/x86/sandybridge/ |
H A D | frontend.json | 3 …front end is resteered, mainly when the BPU cannot provide a correct prediction and this is correc… 12 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switches.", 21 "BriefDescription": "Decode Stream Buffer (DSB)-to-MITE switch true penalty cycles.", 26 …-end cannot accept new micro-ops. The penalty for these switches is potentially several cycles o… 179 …front-end in delivering uops. Microcode assists are used for complex instructions or scenarios th… 248 …-end per cycle, per thread, when the back-end was not stalled. In the ideal case 4 uops can be de… 274 "BriefDescription": "Cycles when 1 or more uops were delivered to the by the front end.", 295 "BriefDescription": "Cycles with less than 2 uops delivered by the front end.", 305 "BriefDescription": "Cycles with less than 3 uops delivered by the front end.",
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/freebsd/sys/cam/ctl/ |
H A D | ctl_frontend.h | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 5 * Copyright (c) 2014-2017 Alexander Motin <mav@FreeBSD.org> 33 * $Id: //depot/users/kenm/FreeBSD-test2/sys/cam/ctl/ctl_frontend.h#2 $ 36 * CAM Target Layer front end registration hooks 96 * (Front End Target Driver) and the CTL layer. Here is a description of 99 * port_type: This field tells CTL what kind of front end it is 103 * the ioctl front end), and therefore its module 105 * CTL ioctl front end should continue to use the 108 * know what kind of front end it is dealing with, so [all …]
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/freebsd/contrib/llvm-project/llvm/lib/IR/ |
H A D | BasicBlock.cpp | 1 //===-- BasicBlock.cpp - Implement BasicBlock related methods -------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 34 "experimental-debuginfo-iterators", 37 "--preserve-input-debuginfo-format=true."), 40 "preserve-input-debuginfo-format", cl::Hidden, 44 "contain debug records or intrinsics. Ignored in llvm-link, " 45 "llvm-lto, and llvm-lto2.")); 49 "write-experimental-debuginfo-iterators-to-bitcode", cl::Hidden, [all …]
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/freebsd/contrib/llvm-project/clang/lib/Driver/ |
H A D | MultilibBuilder.cpp | 1 //===- MultilibBuilder.cpp - MultilibBuilder Implementation -===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 38 if (seg.front() != '/') { in normalizePathSegment() 79 assert(StringRef(Flag).front() == '-' || StringRef(Flag).front() == '!'); in isValid() 81 if (SI == FlagSet.end()) in isValid() 83 else if (Flags[I] != Flags[SI->getValue()]) in isValid() 102 if (Flag.front() == '-') in Maybe() 148 Flags.insert(Flags.end(), Base.flags().begin(), Base.flags().end()); in compose() 149 Flags.insert(Flags.end(), New.flags().begin(), New.flags().end()); in compose() [all …]
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/freebsd/contrib/llvm-project/libcxx/include/__ranges/ |
H A D | view_interface.h | 1 // -*- C++ -*- 2 //===----------------------------------------------------------------------===// 6 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 8 //===----------------------------------------------------------------------===// 60 return ranges::begin(__derived()) == ranges::end(__derived()); 71 return ranges::begin(__derived()) == ranges::end(__derived()); 107 return std::__to_unsigned_like(ranges::end(__derived()) - ranges::begin(__derived())); in size() 114 return std::__to_unsigned_like(ranges::end(__derived()) - ranges::begin(__derived())); in size() 118 _LIBCPP_HIDE_FROM_ABI constexpr decltype(auto) front() in decltype() 122 !empty(), "Precondition `!empty()` not satisfied. `.front()` called on an empty view."); in decltype() [all …]
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