| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | simple-card.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/simple-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
14 frame-master:
15 description: Indicates dai-link frame master.
18 bitclock-master:
19 description: Indicates dai-link bit clock master
22 frame-inversion:
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| H A D | mikroe,mikroe-proto.txt | 1 Mikroe-PROTO audio board
4 - compatible: "mikroe,mikroe-proto"
5 - dai-format: Must be "i2s".
6 - i2s-controller: The phandle of the I2S controller.
7 - audio-codec: The phandle of the WM8731 audio codec.
9 - model: The user-visible name of this sound complex.
10 - bitclock-master: Indicates dai-link bit clock master; for details see simple-card.txt (1).
11 - frame-master: Indicates dai-link frame master; for details see simple-card.txt (1).
13 (1) : There must be the same master for both bit and frame clocks.
17 compatible = "mikroe,mikroe-proto";
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| H A D | fsl-asoc-card.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl-asoc-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
28 - Shengjiu Wang <shengjiu.wang@nxp.com>
33 - items:
34 - enum:
35 - fsl,imx-sgtl5000
36 - fsl,imx25-pdk-sgtl5000
37 - fsl,imx53-cpuvo-sgtl5000
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| H A D | audio-graph-port.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/audio-graph-port.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
15 port-base:
17 - $ref: /schemas/graph.yaml#/$defs/port-base
18 - $ref: /schemas/sound/dai-params.yaml#
20 mclk-fs:
21 $ref: simple-card.yaml#/definitions/mclk-fs
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | ulcb-kf-audio-graph-card-mix+split.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
12 * (A) CPU0 (2ch) <----> (2ch) (X) ak4613 (MIX-0)
13 * (B) CPU1 (2ch) --/ (MIX-1)
14 * (C) CPU2 (2ch) ----> (8ch) (Y) PCM3168A-p (TDM-0 : 0,1ch)
15 * (D) CPU3 (2ch) --/ (TDM-1 : 2,3ch)
16 * (E) CPU4 (2ch) --/ (TDM-2 : 4,5ch)
17 * (F) CPU5 (2ch) --/ (TDM-3 : 6,7ch)
18 * (G) CPU6 (6ch) <---- (6ch) (Z) PCM3168A-c
20 * (A) aplay -D plughw:0,0 xxx.wav (MIX-0)
21 * (B) aplay -D plughw:0,1 xxx.wav (MIX-1)
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| H A D | ulcb-kf-audio-graph-card2-mix+split.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
12 * (A) CPU0 (2ch) <----> (2ch) (X) ak4613 (MIX-0)
13 * (B) CPU1 (2ch) --/ (MIX-1)
14 * (C) CPU3 (2ch) ----> (8ch) (Y) PCM3168A-p (TDM-0 : 0,1ch)
15 * (D) CPU2 (2ch) --/ (TDM-1 : 2,3ch)
16 * (E) CPU4 (2ch) --/ (TDM-2 : 4,5ch)
17 * (F) CPU5 (2ch) --/ (TDM-3 : 6,7ch)
18 * (G) CPU6 (6ch) <---- (6ch) (Z) PCM3168A-c
20 * (A) aplay -D plughw:0,0 xxx.wav (MIX-0)
21 * (B) aplay -D plughw:0,1 xxx.wav (MIX-1)
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| H A D | ulcb-simple-audio-card.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 * (A) CPU0 <----> ak4613
10 * (B) CPU1 ----> HDMI
12 * (A) aplay -D plughw:0,0 xxx.wav
13 * (B) aplay -D plughw:0,1 xxx.wav
15 * (A) arecord -D plughw:0,0 xxx.wav
20 compatible = "simple-audio-card";
21 label = "snd-ulcb";
23 #address-cells = <1>;
24 #size-cells = <0>;
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| H A D | ulcb-audio-graph-card.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 * (A) CPU0 <-----> ak4613
10 * (B) CPU1 -----> HDMI
12 * (A) aplay -D plughw:0,0 xxx.wav
13 * (B) aplay -D plughw:0,1 xxx.wav
15 * (A) arecord -D plughw:0,0 xxx.wav
20 compatible = "audio-graph-card";
21 label = "snd-ulcb";
23 dais = <&snd_ulcb1 /* (A) CPU0 <-> ak4613 */
24 &snd_ulcb2 /* (B) CPU1 -> HDMI */
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| H A D | ulcb-kf-simple-audio-card.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 * (A) CPU0 <----> ak4613
10 * (B) CPU1 ----> HDMI
11 * (C) CPU2 ----> PCM3168A-p
12 * (D) CPU3 <---- PCM3168A-c
14 * (A) aplay -D plughw:0,0 xxx.wav
15 * (B) aplay -D plughw:0,1 xxx.wav
16 * (C) aplay -D plughw:1,0 xxx.wav
18 * (A) arecord -D plughw:0,0 xxx.wav
19 * (D) arecord -D plughw:1,1 xxx.wav
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| H A D | ulcb-audio-graph-card-mix+split.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
12 * (A) CPU0 (2ch) <-----> (2ch) (X) ak4613 (MIX-0)
13 * (B) CPU1 (2ch) --/ (MIX-1)
15 * (A) aplay -D plughw:0,0 xxx.wav
16 * (B) aplay -D plughw:0,1 xxx.wav
18 * (A) arecord -D plughw:0,0 xxx.wav
23 compatible = "audio-graph-scu-card";
24 label = "snd-ulcb-mix";
38 #address-cells = <1>;
39 #size-cells = <0>;
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| H A D | ulcb-kf-audio-graph-card.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
9 * (A) CPU0 <----> ak4613
10 * (B) CPU1 ----> HDMI
11 * (C) CPU2 ----> PCM3168A-p (8ch)
12 * (D) CPU3 <---- PCM3168A-c (6ch)
14 * (A) aplay -D plughw:0,0 xxx.wav
15 * (B) aplay -D plughw:0,1 xxx.wav
16 * (C) aplay -D plughw:1,0 xxx.wav
18 * (A) arecord -D plughw:0,0 xxx.wav
19 * (D) arecord -D plughw:1,1 xxx.wav
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| /linux/Documentation/sound/soc/ |
| H A D | clocking.rst | 9 Master Clock
10 ------------
12 Every audio subsystem is driven by a master clock (sometimes referred to as MCLK
13 or SYSCLK). This audio master clock can be derived from a number of sources
17 Some master clocks (e.g. PLLs and CPU based clocks) are configurable in that
19 power). Other master clocks are fixed at a set frequency (i.e. crystals).
23 ----------
28 The DAI also has a frame clock to signal the start of each audio frame. This
29 clock is sometimes referred to as LRC (left right clock) or FRAME. This clock
32 Bit Clock can be generated as follows:-
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| H A D | dai.rst | 16 frame (FRAME) (usually 48kHz) is always driven by the controller. Each AC97
17 frame is 21uS long and is divided into 13 time slots.
29 controller or CODEC can drive (master) the BCLK and LRC clock lines. Bit clock
30 usually varies depending on the sample rate and the master system clock
35 I2S has several different operating modes:-
58 Common PCM operating modes:-
61 MSB is transmitted on falling edge of first BCLK after FRAME/SYNC.
64 MSB is transmitted on rising edge of FRAME/SYNC.
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| /linux/include/linux/dma/ |
| H A D | xilinx_dma.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
5 * Copyright (C) 2010-2014 Xilinx, Inc. All rights reserved.
11 #include <linux/dma-mapping.h>
15 * struct xilinx_vdma_config - VDMA Configuration structure
16 * @frm_dly: Frame delay
17 * @gen_lock: Whether in gen-lock mode
18 * @master: Master that it syncs to
19 * @frm_cnt_en: Enable frame count enable
21 * @park_frm: Frame to park on
25 * @ext_fsync: External Frame Sync source
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| /linux/net/hsr/ |
| H A D | hsr_forward.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2011-2014 Autronica Fire and Security AS
5 * 2011-2014 Arvid Brodin, arvid.brodin@alten.se
7 * Frame router for HSR and PRP.
24 * --
25 * Or not - resetting the counter and bridging the frame would create a
29 * frame is received from a particular node, we know something is wrong.
47 if (!ether_addr_equal(eth_hdr->h_dest, in is_supervision_frame()
48 hsr->sup_multicast_addr)) in is_supervision_frame()
52 if (!(eth_hdr->h_proto == htons(ETH_P_PRP) || in is_supervision_frame()
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| H A D | hsr_device.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2011-2014 Autronica Fire and Security AS
5 * 2011-2014 Arvid Brodin, arvid.brodin@alten.se
23 return dev && (dev->flags & IFF_UP); in is_admin_up()
31 static void hsr_set_operstate(struct hsr_port *master, bool has_carrier) in hsr_set_operstate() argument
33 struct net_device *dev = master->dev; in hsr_set_operstate()
46 static bool hsr_check_carrier(struct hsr_port *master) in hsr_check_carrier() argument
52 hsr_for_each_port(master->hsr, port) { in hsr_check_carrier()
53 if (port->type != HSR_PT_MASTER && is_slave_up(port->dev)) { in hsr_check_carrier()
54 netif_carrier_on(master->dev); in hsr_check_carrier()
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| H A D | hsr_slave.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2011-2014 Autronica Fire and Security AS
5 * 2011-2014 Arvid Brodin, arvid.brodin@alten.se
7 * Frame handler other utility functions for HSR and PRP.
32 if (unlikely(skb->pkt_type == PACKET_LOOPBACK)) in hsr_handle_frame()
40 port = hsr_port_get_rcu(skb->dev); in hsr_handle_frame()
43 hsr = port->hsr; in hsr_handle_frame()
45 if (hsr_addr_is_self(port->hsr, eth_hdr(skb)->h_source)) { in hsr_handle_frame()
55 protocol = eth_hdr(skb)->h_proto; in hsr_handle_frame()
57 if (!(port->dev->features & NETIF_F_HW_HSR_TAG_RM) && in hsr_handle_frame()
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| /linux/drivers/media/v4l2-core/ |
| H A D | v4l2-ctrls-core.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2010-2021 Hans Verkuil <hverkuil-cisco@xs4all.nl>
11 #include <media/v4l2-ctrls.h>
12 #include <media/v4l2-event.h>
13 #include <media/v4l2-fwnode.h>
15 #include "v4l2-ctrls-priv.h"
23 ev->type = V4L2_EVENT_CTRL; in fill_event()
24 ev->id = ctrl->id; in fill_event()
25 ev->u.ctrl.changes = changes; in fill_event()
26 ev->u.ctrl.type = ctrl->type; in fill_event()
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| /linux/sound/soc/ti/ |
| H A D | davinci-i2s.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 * based on davinci-mcasp.c DT support
30 #include "edma-pcm.h"
31 #include "davinci-i2s.h"
33 #define DRV_NAME "davinci-i2s"
38 * - This driver supports the "Audio Serial Port" (ASP),
41 * - But it labels it a "Multi-channel Buffered Serial Port"
43 * backward-compatible, possibly explaining that confusion.
45 * - OMAP chips have a controller called McBSP, which is
48 * - Newer DaVinci chips have a controller called McASP,
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| /linux/drivers/net/wireless/ti/wl12xx/ |
| H A D | conf.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
39 * in WLAN / BT master basic rate
41 * Range: 0 - 255 (ms)
50 * Range: 0 - 255 (ms)
57 * in WLAN / BT master EDR
59 * Range: 0 - 255 (ms)
68 * Range: 0 - 255 (ms)
75 * in WLAN PSM / BT master/slave BR
77 * Range: 0 - 255 (ms)
84 * in WLAN PSM / BT master/slave EDR
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| /linux/arch/arm/boot/dts/intel/pxa/ |
| H A D | pxa300-raumfeld-connector.dts | 1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "pxa300-raumfeld-common.dtsi"
6 #include "pxa300-raumfeld-tuneable-clock.dtsi"
10 compatible = "raumfeld,raumfeld-connector-pxa303", "marvell,pxa300";
13 compatible = "simple-audio-card";
14 simple-audio-card,name = "Raumfeld Connector";
15 #address-cells = <1>;
16 #size-cells = <0>;
18 simple-audio-card,dai-link@0 {
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| /linux/drivers/atm/ |
| H A D | suni.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * drivers/atm/suni.h - S/UNI PHY driver
6 /* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
17 #define SUNI_MRI 0x00 /* Master Reset and Identity / Load
19 #define SUNI_MC 0x01 /* Master Configuration */
20 #define SUNI_MIS 0x02 /* Master Interrupt Status */
22 #define SUNI_MCM 0x04 /* Master Clock Monitor */
23 #define SUNI_MCT 0x05 /* Master Control */
26 /* 0x08-0x0F reserved */
29 #define SUNI_RSOP_SBL 0x12 /* RSOP Section BIP-8 LSB */
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | fsl-ls1012a-oxalis.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 /dts-v1/;
11 #include "fsl-ls1012a.dtsi"
15 compatible = "ebs-systart,oxalis", "fsl,ls1012a";
17 sys_mclk: clock-mclk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
20 clock-frequency = <25000000>;
23 reg_1p8v: regulator-1p8v {
24 compatible = "regulator-fixed";
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| H A D | fsl-ls1012a-frdm.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include "fsl-ls1012a.dtsi"
15 compatible = "fsl,ls1012a-frdm", "fsl,ls1012a";
17 sys_mclk: clock-mclk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
20 clock-frequency = <25000000>;
23 sc16is7xx_clk: clock-sc16is7xx {
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| /linux/arch/alpha/kernel/ |
| H A D | err_titan.c | 1 // SPDX-License-Identifier: GPL-2.0
58 nxs -= 4; in titan_parse_c_misc()
66 printk("%s Non-existent memory access from: %s %d\n", in titan_parse_c_misc()
119 " Source: %-6s Command: %-8s Syndrome: 0x%08x\n" in titan_parse_p_serror()
198 * master aborts as the BIOS probes the capabilities of the in titan_parse_p_perror()
200 * is a master abort (No DevSel as PCI Master) and the command in titan_parse_p_perror()
205 * dismiss master aborts to VGA frame buffer space in titan_parse_p_perror()
206 * (0xA0000 - 0xC0000) and legacy BIOS space (0xC0000 - 0x100000) in titan_parse_p_perror()
211 * can cause multiple master aborts and the error interrupt can in titan_parse_p_perror()
213 * it is possible for a second master abort to occur between the in titan_parse_p_perror()
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