fpga\-region (full) in projects: linux - OpenGrok search results

Searched +full:fpga +full:- +full:region (Results 1 – 14 of 14) sorted by relevance

/illumos-gate/usr/src/uts/common/io/chxge/com/
H A D	tp.c	23 * Copyright (C) 2003-2005 Chelsio Communications. All rights reserved. 46 num -= num % 24; in pm_num_pages() 54 num = pm_num_pages(p->pm_size - p->pm_rx_base, p->pm_rx_pg_size); in tp_pm_configure() 55 if (p->pm_rx_num_pgs > num) in tp_pm_configure() 56 p->pm_rx_num_pgs = num; in tp_pm_configure() 58 num = pm_num_pages(p->pm_rx_base - p->pm_tx_base, p->pm_tx_pg_size); in tp_pm_configure() 59 if (p->pm_tx_num_pgs > num) in tp_pm_configure() 60 p->pm_tx_num_pgs = num; in tp_pm_configure() 62 t1_write_reg_4(adapter, A_TP_PM_SIZE, p->pm_size); in tp_pm_configure() 63 t1_write_reg_4(adapter, A_TP_PM_RX_BASE, p->pm_rx_base); in tp_pm_configure() [all …]
/illumos-gate/usr/src/uts/common/io/sfxge/common/
H A D	efx_regs_mcdi.h	2 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved. 33 /* Power-on reset state / 55 / The 'doorbell' addresses are hard-wired to alert the MC when written / 58 / The rest of these are firmware-defined / 66 / Values to be written to the per-port status dword in shared 95 * \| \| \--- Response 96 * \| \------- Error 97 * \------------------------------ Resync (always set) 152 * - To complete a shared memory request if XFLAGS_EVREQ was set 153 * - As a notification (link state, i2c event), controlled [all …]
/illumos-gate/usr/src/uts/common/io/bnx/570x/driver/common/lmdev/
H A D	bnx_hw_reset.c	2 * Copyright 2014-2017 Cavium, Inc. 9 * at http://opensource.org/licenses/CDDL-1.0 42 if(pdev->vars.fw_timed_out) in fw_reset_sync() 47 pdev->vars.fw_wr_seq++; in fw_reset_sync() 48 msg_data \|= (pdev->vars.fw_wr_seq & DRV_MSG_SEQ); in fw_reset_sync() 87 pdev->hw_info.shmem_base + in fw_reset_sync() 100 pdev->hw_info.shmem_base + in fw_reset_sync() 118 pdev->hw_info.shmem_base + in fw_reset_sync() 122 pdev->vars.fw_timed_out = TRUE; in fw_reset_sync() 123 pdev->fw_timed_out_cnt++; in fw_reset_sync() [all …]
/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A D	ecore_dev.c	9 * or http://opensource.org/licenses/CDDL-1.0. 23 * Copyright 2014-2017 Cavium, Inc. 30 * at http://opensource.org/licenses/CDDL-1.0 68 /* TODO - there's a bug in DCBx re-configuration flows in MF, as the QM 71 * Eventually, this needs to move into a MFW-covered HW-lock as arbitration 98 if (IS_VF(p_hwfn->p_dev)) { in ecore_hw_bar_size() 99 /* TODO - assume each VF hwfn has 64Kb for Bar0; Bar1 can be in ecore_hw_bar_size() 106 val = ecore_rd(p_hwfn, p_hwfn->p_main_ptt, bar_reg); in ecore_hw_bar_size() 114 if (p_hwfn->p_dev->num_hwfns > 1) { in ecore_hw_bar_size() 132 p_dev->dp_level = dp_level; in ecore_init_dp() [all …]
H A D	release.txt	11 ------ 12 1. Problem: CQ92630 - NULL pointer dereference in query stats flow 26 ------ 37 2. Problem: CQ92434 - system crash after loading qedr with MTU=128. 45 3. Problem: CQ91521 - System hits assertion while trying to modify Jumbo 48 Change: OSAL_IOV_VF_VPORT_STOP is introduced to allow upper-client to 55 4. Problem: CQ91595 - Firmware stop sending packets for some time after 64 5. Problem: CQ92301, CQ92431, CQ92465 - Firmware assertion may happen when 73 6. Problem: CQ92424 - When peer is unreachable, connection tear-down may 83 7. Problem: CQ92054 - FW assertion may happen on a race condition where RST [all …]
/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A D	lm_devinfo.c	45 return pdev->vars.last_recycling_timestamp; in lm_get_timestamp_of_recent_cid_recycling() 54 return pdev->params.max_supported_toe_cons; in lm_get_max_supported_toe_cons() 63 return (pdev->params.l4_rss_is_possible != L4_RSS_DISABLED); in lm_get_toe_rss_possibility() 102 if (pdev->hw_info.mcp_detected == 1) in lm_get_iscsi_boot_info_block() 106 iscsi_info_block_hdr_ptr->signature = val ; in lm_get_iscsi_boot_info_block() 112 SET_FLAGS(iscsi_info_block_hdr_ptr->boot_flags, BOOT_INFO_FLAGS_UEFI_BOOT ); in lm_get_iscsi_boot_info_block() 116 RESET_FLAGS(iscsi_info_block_hdr_ptr->boot_flags, BOOT_INFO_FLAGS_UEFI_BOOT ); in lm_get_iscsi_boot_info_block() 122 iscsi_info_block_hdr_ptr->signature = 0; in lm_get_iscsi_boot_info_block() 136 if (pdev->hw_info.mcp_detected == 1) in lm_get_ibft_physical_addr_for_efi() 140 //iscsi_info_block_hdr_ptr->signature = val ; in lm_get_ibft_physical_addr_for_efi() [all …]
H A D	lm_hw_init_reset.c	137 const u8_t bus_num = INST_ID_TO_BUS_NUM(PFDEV(pdev)->vars.inst_id) ; in lm_reset_set_inprogress() 145 const u8_t bus_num = INST_ID_TO_BUS_NUM(PFDEV(pdev)->vars.inst_id) ; in lm_reset_clear_inprogress() 153 const u8_t bus_num = INST_ID_TO_BUS_NUM(PFDEV(pdev)->vars.inst_id) ; in lm_pm_reset_is_inprogress() 177 if (!pdev->params.enable_error_recovery \|\| CHIP_IS_E1x(pdev)) in lm_er_handling_pending() 193 pdev->panic \|\| in lm_reset_is_inprogress() 200 ------------------------------------------------------------------------ 201 FLR in progress handling - 202 *------------------------------------------------------------------------- 206 pdev->params.is_flr = TRUE; in lm_fl_reset_set_inprogress() 220 pdev->params.is_flr = FALSE; in lm_fl_reset_clear_inprogress() [all …]
/illumos-gate/usr/src/uts/common/io/cxgbe/common/
H A D	t4_hw.c	15 * Copyright (C) 2003-2019 Chelsio Communications. All rights reserved. 33 * t4_wait_op_done_val - wait until an operation is completed 36 * @mask: a single-bit field within @reg that indicates completion 45 * operation completes and -EAGAIN otherwise. 58 if (--attempts == 0) in t4_wait_op_done_val() 59 return -EAGAIN; in t4_wait_op_done_val() 73 * t4_set_reg_field - set a register field to a value 92 * t4_read_indirect - read indirectly addressed registers 107 while (nregs--) { in t4_read_indirect() 115 * t4_write_indirect - write indirectly addressed registers [all …]
/illumos-gate/usr/src/uts/common/io/fibre-channel/fca/qlc/
H A D	ql_xioctl.c	38 * * COPYRIGHT (C) 1996-2015 QLOGIC CORPORATION ** 187 if (ha->xioctl != NULL) { in ql_alloc_xioctl_resource() 189 ha->instance); in ql_alloc_xioctl_resource() 198 ha->xioctl = xp; in ql_alloc_xioctl_resource() 201 xp->aen_tracking_queue = kmem_zalloc(EXT_DEF_MAX_AEN_QUEUE * in ql_alloc_xioctl_resource() 203 if (xp->aen_tracking_queue == NULL) { in ql_alloc_xioctl_resource() 204 EL(ha, "failed, kmem_zalloc-2\n"); in ql_alloc_xioctl_resource() 227 ql_xioctl_t xp = ha->xioctl; in ql_free_xioctl_resource() 236 if (xp->aen_tracking_queue != NULL) { in ql_free_xioctl_resource() 237 kmem_free(xp->aen_tracking_queue, EXT_DEF_MAX_AEN_QUEUE in ql_free_xioctl_resource() [all …]
/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/hw/
H A D	reg_addr.h	9 * or http://opensource.org/licenses/CDDL-1.0. 23 * Copyright 2014-2017 Cavium, Inc. 30 * at http://opensource.org/licenses/CDDL-1.0 85 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl… 86 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea… 87 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn… 88 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea… 90 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of … 92 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 100 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… [all …]
H A D	reg_addr_bb.h	9 * or http://opensource.org/licenses/CDDL-1.0. 23 * Copyright 2014-2017 Cavium, Inc. 30 * at http://opensource.org/licenses/CDDL-1.0 84 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl… 85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea… 86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn… 87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea… 89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of … 91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… [all …]
H A D	reg_addr_k2.h	9 * or http://opensource.org/licenses/CDDL-1.0. 23 * Copyright 2014-2017 Cavium, Inc. 30 * at http://opensource.org/licenses/CDDL-1.0 84 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl… 85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea… 86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn… 87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea… 89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of … 91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… [all …]
H A D	reg_addr_e5.h	9 * or http://opensource.org/licenses/CDDL-1.0. 23 * Copyright 2014-2017 Cavium, Inc. 30 * at http://opensource.org/licenses/CDDL-1.0 84 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl… 85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea… 86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn… 87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea… 89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of … 91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… [all …]
H A D	reg_addr_ah_compile15.h	9 * or http://opensource.org/licenses/CDDL-1.0. 23 * Copyright 2014-2017 Cavium, Inc. 30 * at http://opensource.org/licenses/CDDL-1.0 85 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of … 87 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 96 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 98 … has_mem_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E… 144 …_SYS_ERR (0x1<<30) // Fatal or Non-Fatal Error Message s… 148 …:0x20 This is the PCIE compliant status/command register (bits 31-16: status, bits 15-0: command)… 149 …:0x20 This is the PCIE compliant status/command register (bits 31-16: status, bits 15-0: command)… [all …]

Project(s)	No entries found freebsd illumos-gate titanic_41 titanic_44 titanic_50 titanic_51 titanic_52

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