| /linux/sound/soc/samsung/ |
| H A D | smdk_spdif.c | 20 struct clk *fout_epll, *mout_epll, *sclk_audio0, *sclk_spdif; in set_audio_clock_heirachy() local
23 fout_epll = clk_get(NULL, "fout_epll"); in set_audio_clock_heirachy()
24 if (IS_ERR(fout_epll)) { in set_audio_clock_heirachy()
25 printk(KERN_WARNING "%s: Cannot find fout_epll.\n", in set_audio_clock_heirachy()
55 clk_set_parent(mout_epll, fout_epll); in set_audio_clock_heirachy()
65 clk_put(fout_epll); in set_audio_clock_heirachy()
77 struct clk *fout_epll, *sclk_spdif; in set_audio_clock_rate() local
79 fout_epll = clk_get(NULL, "fout_epll"); in set_audio_clock_rate()
80 if (IS_ERR(fout_epll)) { in set_audio_clock_rate()
81 printk(KERN_ERR "%s: failed to get fout_epll\n", __func__); in set_audio_clock_rate()
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | samsung,s5pv210-audss-clock.yaml | 45 - const: fout_epll
75 clock-names = "hclk", "xxti", "fout_epll", "sclk_audio0";
76 clocks = <&clocks DOUT_HCLKP>, <&xxti>, <&clocks FOUT_EPLL>,
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| H A D | samsung,exynos-audss-clock.yaml | 34 Input PLL to the AudioSS block, parent of mout_audss. "fout_epll" is
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| /linux/drivers/clk/samsung/ |
| H A D | clk-s5pv210.c | 146 "fout_epll"
310 "fout_epll",
333 "fout_epll",
720 [epll] = PLL(pll_4600, FOUT_EPLL, "fout_epll", "fin_pll",
732 [epll] = PLL(pll_4500, FOUT_EPLL, "fout_epll", "fin_pll",
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| H A D | clk-s3c64xx.c | 95 PNAME(epll_p) = { "fin_pll", "fout_epll" };
305 PLL(pll_6553, FOUT_EPLL, "fout_epll", "fin_pll",
313 ALIAS(FOUT_EPLL, NULL, "fout_epll"),
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| H A D | clk-s5pv210-audss.c | 92 pll_in = devm_clk_get(&pdev->dev, "fout_epll"); in s5pv210_audss_clk_probe()
94 dev_err(&pdev->dev, "failed to get fout_epll clock\n"); in s5pv210_audss_clk_probe()
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| H A D | clk-exynos5410.c | 73 PNAME(epll_p) = { "fin_pll", "fout_epll" };
247 [epll] = PLL(pll_2650x, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK,
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| H A D | clk-exynos-audss.c | 125 const char *mout_audss_p[] = {"fin_pll", "fout_epll"}; in exynos_audss_clk_probe()
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| H A D | clk-exynos4.c | 285 PNAME(mout_epll_p) = { "fin_pll", "fout_epll", };
324 PNAME(clkout_top_p4210) = { "fout_epll", "fout_vpll", "sclk_hdmi24m",
367 PNAME(clkout_top_p4x12) = { "fout_epll", "fout_vpll", "sclk_hdmi24m",
1156 [epll] = PLL(pll_4600, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
1167 [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
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| H A D | clk-exynos5250.c | 182 PNAME(mout_epll_p) = { "fin_pll", "fout_epll" };
746 [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK,
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| H A D | clk-exynos3250.c | 876 PNAME(mout_epll_p) = { "fin_pll", "fout_epll", };
920 PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
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| H A D | clk-exynos5420.c | 304 PNAME(mout_epll_p) = {"fin_pll", "fout_epll"};
1471 [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll", EPLL_LOCK,
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| /linux/include/dt-bindings/clock/ |
| H A D | samsung,s3c64xx-clock.h | 24 #define FOUT_EPLL 5 macro
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| H A D | s5pv210.h | 16 #define FOUT_EPLL 4 macro
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| /linux/arch/arm/boot/dts/samsung/ |
| H A D | s5pv210.dtsi | 227 "fout_epll",
230 <&clocks FOUT_EPLL>,
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