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/linux/Documentation/devicetree/bindings/display/bridge/
H A Danalogix,dp.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
21 clock-names: true
25 phy-names:
28 force-hpd:
31 Indicate driver need force hpd when hpd detect failed, this
32 is used for some eDP screen which don not have a hpd signal.
34 hpd-gpios:
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/linux/drivers/gpu/drm/radeon/
H A Dradeon_connectors.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
42 struct drm_device *dev = connector->dev; in radeon_connector_hotplug()
43 struct radeon_device *rdev = dev->dev_private; in radeon_connector_hotplug()
46 /* bail if the connector does not have hpd pin, e.g., in radeon_connector_hotplug()
49 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) in radeon_connector_hotplug()
52 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd); in radeon_connector_hotplug()
56 if (connector->dpms != DRM_MODE_DPMS_ON) in radeon_connector_hotplug()
60 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { in radeon_connector_hotplug()
62 radeon_connector->con_priv; in radeon_connector_hotplug()
65 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) in radeon_connector_hotplug()
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H A Dr100.c111 * r100_wait_for_vblank - vblank wait asic callback.
116 * Wait for vblank on the requested crtc (r1xx-r4xx).
122 if (crtc >= rdev->num_crtc) in r100_wait_for_vblank()
152 * r100_page_flip - pageflip callback.
159 * Does the actual pageflip (r1xx-r4xx).
166 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in r100_page_flip()
168 struct drm_framebuffer *fb = radeon_crtc->base.primary->fb; in r100_page_flip()
174 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); in r100_page_flip()
177 pitch_pixels = fb->pitches[0] / fb->format->cpp[0]; in r100_page_flip()
178 crtc_pitch = DIV_ROUND_UP(pitch_pixels * fb->format->cpp[0] * 8, in r100_page_flip()
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H A Dr600.c105 AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL
125 spin_lock_irqsave(&rdev->rcu_idx_lock, flags); in r600_rcu_rreg()
128 spin_unlock_irqrestore(&rdev->rcu_idx_lock, flags); in r600_rcu_rreg()
136 spin_lock_irqsave(&rdev->rcu_idx_lock, flags); in r600_rcu_wreg()
139 spin_unlock_irqrestore(&rdev->rcu_idx_lock, flags); in r600_rcu_wreg()
147 spin_lock_irqsave(&rdev->uvd_idx_lock, flags); in r600_uvd_ctx_rreg()
150 spin_unlock_irqrestore(&rdev->uvd_idx_lock, flags); in r600_uvd_ctx_rreg()
158 spin_lock_irqsave(&rdev->uvd_idx_lock, flags); in r600_uvd_ctx_wreg()
161 spin_unlock_irqrestore(&rdev->uvd_idx_lock, flags); in r600_uvd_ctx_wreg()
165 * r600_get_allowed_info_register - fetch the register for the info ioctl
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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_connectors.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
45 struct drm_device *dev = connector->dev; in amdgpu_connector_hotplug()
49 /* bail if the connector does not have hpd pin, e.g., in amdgpu_connector_hotplug()
52 if (amdgpu_connector->hpd.hpd == AMDGPU_HPD_NONE) in amdgpu_connector_hotplug()
55 amdgpu_display_hpd_set_polarity(adev, amdgpu_connector->hpd.hpd); in amdgpu_connector_hotplug()
58 if (connector->dpms != DRM_MODE_DPMS_ON) in amdgpu_connector_hotplug()
62 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) { in amdgpu_connector_hotplug()
64 amdgpu_connector->con_priv; in amdgpu_connector_hotplug()
67 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT) in amdgpu_connector_hotplug()
71 dig_connector->dp_sink_type = amdgpu_atombios_dp_get_sinktype(amdgpu_connector); in amdgpu_connector_hotplug()
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H A Damdgpu_drv.c61 * - 3.0.0 - initial driver
62 * - 3.1.0 - allow reading more status registers (GRBM, SRBM, SDMA, CP)
63 * - 3.2.0 - GFX8: Uses EOP_TC_WB_ACTION_EN, so UMDs don't have to do the same
65 * - 3.3.0 - Add VM support for UVD on supported hardware.
66 * - 3.4.0 - Add AMDGPU_INFO_NUM_EVICTIONS.
67 * - 3.5.0 - Add support for new UVD_NO_OP register.
68 * - 3.6.0 - kmd involves use CONTEXT_CONTROL in ring buffer.
69 * - 3.7.0 - Add support for VCE clock list packet
70 * - 3.8.0 - Add support raster config init in the kernel
71 * - 3.9.0 - Add support for memory query info about VRAM and GTT.
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/linux/drivers/extcon/
H A Dextcon-usbc-cros-ec.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/extcon-provider.h>
49 * cros_ec_pd_command() - Send a command to the EC.
73 return -ENOMEM; in cros_ec_pd_command()
75 msg->version = version; in cros_ec_pd_command()
76 msg->command = command; in cros_ec_pd_command()
77 msg->outsize = outsize; in cros_ec_pd_command()
78 msg->insize = insize; in cros_ec_pd_command()
81 memcpy(msg->data, outdata, outsize); in cros_ec_pd_command()
83 ret = cros_ec_cmd_xfer_status(info->ec, msg); in cros_ec_pd_command()
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/linux/drivers/gpu/drm/amd/display/dc/
H A Ddc.h2 * Copyright 2012-2026 Advanced Micro Devices, Inc.
69 * MAX_SURFACES - representative of the upper bound of surfaces that can be piped to a single CRTC
73 * MAX_PLANES - representative of the upper bound of planes that are supported by the HW
128 // for example, 1080p -> 8K is 4.0, or 4000 raw value
136 // for example, 8K -> 1080p is 0.25, or 250 raw value
148 * DOC: color-management-caps
153 * abstracted HW. DCE 5-12 had almost no important changes, but starting with
160 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
176 * struct dpp_color_caps - color pipeline capabilities for display pipe and
181 * just plain 256-entry lookup
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/linux/drivers/platform/x86/
H A Dmeegopad_anx7428.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver to power on the Analogix ANX7428 USB Type-C crosspoint switch
4 * on MeeGoPad top-set boxes.
6 * The MeeGoPad T8 and T9 are Cherry Trail top-set boxes which
7 * use an ANX7428 to provide a Type-C port with USB3.1 Gen 1 and
8 * DisplayPort over Type-C alternate mode support.
12 * to send the right signal to the 4 highspeed pairs of the Type-C
13 * connector. It also takes care of HPD and AUX channel routing for
16 * IOW the ANX7428 operates fully autonomous and to the x5-Z8350 SoC
17 * things look like there simply is a USB-3 Type-A connector and a
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H A Dapple-gmux.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2012 Andreas Heider <andreas@meetr.de>
19 #include <linux/apple-gmux.h>
32 * A `Lattice XP2`_ on pre-retinas, a `Renesas R4F2113`_ on pre-T2 retinas.
41 * dual GPUs but no built-in display.)
45 * to access a pre-retina gmux are infixed ``_pio_``, those for a pre-T2
54 * https://www.nxp.com/docs/en/data-sheet/PCAL6524.pdf
112 return inb(gmux_data->iostart + port); in gmux_pio_read8()
118 outb(val, gmux_data->iostart + port); in gmux_pio_write8()
123 return inl(gmux_data->iostart + port); in gmux_pio_read32()
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3588-coolpi-cm5-genbook.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/soc/rockchip,vop2.h>
11 #include "rk3588-coolpi-cm5.dtsi"
15 compatible = "coolpi,pi-cm5-genbook", "coolpi,pi-cm5", "rockchip,rk3588";
18 compatible = "pwm-backlight";
19 enable-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&bl_en>;
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H A Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
8 #include "rk3399-base.dtsi"
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
20 compatible = "pwm-backlight";
21 brightness-levels = <
54 default-brightness-level = <200>;
58 edp_panel: edp-panel {
59 compatible = "lg,lp079qx1-sp0v";
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/linux/drivers/gpu/drm/tegra/
H A Doutput.c1 // SPDX-License-Identifier: GPL-2.0-only
19 #include <media/cec-notifier.h>
31 if (output->panel) { in tegra_output_connector_get_modes()
32 err = drm_panel_get_modes(output->panel, connector); in tegra_output_connector_get_modes()
37 if (output->drm_edid) in tegra_output_connector_get_modes()
38 drm_edid = drm_edid_dup(output->drm_edid); in tegra_output_connector_get_modes()
39 else if (output->ddc) in tegra_output_connector_get_modes()
40 drm_edid = drm_edid_read_ddc(connector, output->ddc); in tegra_output_connector_get_modes()
43 cec_notifier_set_phys_addr(output->cec, in tegra_output_connector_get_modes()
44 connector->display_info.source_physical_address); in tegra_output_connector_get_modes()
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/linux/drivers/gpu/drm/nouveau/
H A Dnouveau_connector.c55 const struct drm_connector_helper_funcs *helper = connector->helper_private; in nouveau_conn_native_mode()
56 struct nouveau_drm *drm = nouveau_drm(connector->dev); in nouveau_conn_native_mode()
57 struct drm_device *dev = connector->dev; in nouveau_conn_native_mode()
61 list_for_each_entry(mode, &connector->probed_modes, head) { in nouveau_conn_native_mode()
62 if (helper->mode_valid(connector, mode) != MODE_OK || in nouveau_conn_native_mode()
63 (mode->flags & DRM_MODE_FLAG_INTERLACE)) in nouveau_conn_native_mode()
67 if (mode->type & DRM_MODE_TYPE_PREFERRED) { in nouveau_conn_native_mode()
75 if (mode->hdisplay < high_w) in nouveau_conn_native_mode()
78 if (mode->hdisplay == high_w && mode->vdisplay < high_h) in nouveau_conn_native_mode()
81 if (mode->hdisplay == high_w && mode->vdisplay == high_h && in nouveau_conn_native_mode()
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/linux/drivers/gpu/drm/mediatek/
H A Dmtk_hdmi_v2.c1 // SPDX-License-Identifier: GPL-2.0
57 [MTK_HDMI_V2_CLK_VPP_SPLIT_HDMI] = "hdmi-split",
62 regmap_write(hdmi->regs, TOP_INT_ENABLE00, 0); in mtk_hdmi_v2_hwirq_disable()
63 regmap_write(hdmi->regs, TOP_INT_ENABLE01, 0); in mtk_hdmi_v2_hwirq_disable()
69 regmap_set_bits(hdmi->regs, TOP_INT_ENABLE00, HPD_PORD_HWIRQS); in mtk_hdmi_v2_enable_hpd_pord_irq()
71 regmap_clear_bits(hdmi->regs, TOP_INT_ENABLE00, HPD_PORD_HWIRQS); in mtk_hdmi_v2_enable_hpd_pord_irq()
77 regmap_set_bits(hdmi->regs, hdmi->conf->reg_hdmi_tx_cfg, HDMITX_SW_HPD); in mtk_hdmi_v2_set_sw_hpd()
78 regmap_set_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_OVR); in mtk_hdmi_v2_set_sw_hpd()
79 regmap_set_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_SW); in mtk_hdmi_v2_set_sw_hpd()
81 regmap_clear_bits(hdmi->regs, HDCP2X_CTRL_0, HDCP2X_HPD_OVR); in mtk_hdmi_v2_set_sw_hpd()
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/linux/drivers/gpu/drm/amd/display/amdgpu_dm/
H A Damdgpu_dm.c1 // SPDX-License-Identifier: MIT
3 * Copyright 2015-2026 Advanced Micro Devices, Inc.
101 #include <media/cec-notifier.h>
180 switch (link->dpcd_caps.dongle_type) { in get_subconnector_type()
199 struct dc_link *link = aconnector->dc_link; in update_subconnector_property()
200 struct drm_connector *connector = &aconnector->base; in update_subconnector_property()
203 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) in update_subconnector_property()
206 if (aconnector->dc_sink) in update_subconnector_property()
209 drm_object_property_set_value(&connector->base, in update_subconnector_property()
210 connector->dev->mode_config.dp_subconnector_property, in update_subconnector_property()
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/linux/arch/arm/boot/dts/rockchip/
H A Drk3288-veyron-speedy.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "rk3288-veyron-chromebook.dtsi"
10 #include "rk3288-veyron-broadcom-bluetooth.dtsi"
11 #include "../cros-ec-sbs.dtsi"
15 compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
16 "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
17 "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
18 "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
19 "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
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/linux/drivers/media/i2c/
H A Dtda1997x.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/v4l2-dv-timings.h>
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-dv-timings.h>
22 #include <media/v4l2-event.h>
23 #include <media/v4l2-fwnode.h>
31 #include <dt-bindings/media/tda1997x.h>
40 MODULE_PARM_DESC(debug, "debug level (0-2)");
46 "OBA", /* One-Bit Audio */
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/linux/drivers/gpu/drm/bridge/
H A Dtc358767.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * TC358767/TC358867/TC9595 DSI/DPI-to-DPI/(e)DP bridge driver
6 * All modes are supported -- DPI->(e)DP / DSI->DPI / DSI->(e)DP .
27 #include <linux/media-bus-format.h>
44 /* DSI D-PHY Layer registers */
77 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
110 #define SUB_CFG_TYPE_CONFIG3 (2 << 2) /* LSB aligned 8-bit */
184 #define VID_MN_GEN BIT(6) /* Auto-generate M/N values */
190 #define DP0_VIDMNGEN0 0x0610 /* DP0 Video Force M Value Register */
191 #define DP0_VIDMNGEN1 0x0614 /* DP0 Video Force N Value Register */
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H A Dmegachips-stdpxxxx-ge-b850v3-fw.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for MegaChips STDP4028 with GE B850v3 firmware (LVDS-DP)
4 * Driver for MegaChips STDP2690 with GE B850v3 firmware (DP-DP++)
15 * only needed to read EDID from the STDP2690 and to handle HPD events from the
19 * Host -> LVDS|--(STDP4028)--|DP -> DP|--(STDP2690)--|DP++ -> Video output
71 struct i2c_adapter *adapter = client->adapter; in stdp2690_read_block()
76 .addr = client->addr, in stdp2690_read_block()
81 .addr = client->addr, in stdp2690_read_block()
89 return -1; in stdp2690_read_block()
99 client = ge_b850v3_lvds_ptr->stdp2690_i2c; in ge_b850v3_lvds_edid_read()
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/linux/arch/arm64/kvm/
H A Dat.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 - Linaro Ltd
16 wr->fst = fst; in fail_s1_walk()
17 wr->ptw = s1ptw; in fail_s1_walk()
18 wr->s2 = s1ptw; in fail_s1_walk()
19 wr->failed = true; in fail_s1_walk()
22 #define S1_MMU_DISABLED (-127)
26 return 64 - wi->txsz; in get_ia_size()
32 if (wi->pa52bit) in check_output_size()
33 return wi->max_oa_bits < 52 && (ipa & GENMASK_ULL(51, wi->max_oa_bits)); in check_output_size()
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/linux/drivers/gpu/drm/i915/display/
H A Dintel_dp.c111 * intel_dp_is_edp - is the given port attached to an eDP panel (either CPU or PCH)
123 return dig_port->base.type == INTEL_OUTPUT_EDP; in intel_dp_is_edp()
131 return drm_dp_is_uhbr_rate(crtc_state->port_clock); in intel_dp_is_uhbr()
135 * intel_dp_link_symbol_size - get the link symbol size for a given link rate
139 * rate -> channel coding.
147 * intel_dp_link_symbol_clock - convert link rate to link symbol clock
164 max_rate = drm_dp_tunnel_max_dprx_rate(intel_dp->tunnel); in max_dprx_rate()
166 max_rate = drm_dp_bw_code_to_link_rate(intel_dp->dpcd[DP_MAX_LINK_RATE]); in max_dprx_rate()
183 return drm_dp_tunnel_max_dprx_lane_count(intel_dp->tunnel); in max_dprx_lane_count()
185 return drm_dp_max_lane_count(intel_dp->dpcd); in max_dprx_lane_count()
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H A Dintel_display_types.h3 * Copyright (c) 2007-2008 Intel Corporation
71 /* these are outputs from the chip - integrated only
89 HDMI_AUDIO_OFF_DVI = -2, /* no aux data for HDMI-DVI converter */
90 HDMI_AUDIO_OFF, /* force turn off HDMI audio */
92 HDMI_AUDIO_ON, /* force turn on HDMI audio */
105 * create the DMA scatter-gather list for each FB color plane. This sg
117 * in the rotated and remapped GTT view all no-CCS formats (up to 2
225 * state. This must be called _after_ display->get_pipe_config has
226 * pre-fille
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/linux/drivers/gpu/drm/ast/
H A Dast_dp.c1 // SPDX-License-Identifier: GPL-2.0
62 while (entry->hdisplay && entry->vdisplay) { in ast_astdp_get_mode_index()
63 if (entry->hdisplay == hdisplay && entry->vdisplay == vdisplay) in ast_astdp_get_mode_index()
64 return entry->mode_index; in ast_astdp_get_mode_index()
68 return -EINVAL; in ast_astdp_get_mode_index()
76 * HPD might be set even if no monitor is connected, so also check that in ast_astdp_is_connected()
92 return -EIO; /* extension headers not supported */ in ast_astdp_read_edid_block()
96 * by acquiring the I/O-register lock. in ast_astdp_read_edid_block()
98 mutex_lock(&ast->modeset_lock); in ast_astdp_read_edid_block()
111 ret = -EIO; in ast_astdp_read_edid_block()
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/linux/arch/arm64/boot/dts/qcom/
H A Dsc7280-qcard.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
34 wcd9385: audio-codec-1 {
35 compatible = "qcom,wcd9385-codec";
36 pinctrl-names = "default", "sleep";
37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
38 pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
[all …]

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