| /linux/fs/bcachefs/ |
| H A D | btree_write_buffer.c | 146 EBUG_ON(!trans->c->btree_write_buffer.flushing.pin.seq); in wb_flush_one()
147 EBUG_ON(trans->c->btree_write_buffer.flushing.pin.seq > wb->journal_seq); in wb_flush_one()
228 bch2_journal_pin_add(j, wb->inc.keys.data[0].journal_seq, &wb->flushing.pin, in move_keys_from_inc_to_flushing()
231 darray_resize(&wb->flushing.keys, min_t(size_t, 1U << 20, wb->flushing.keys.nr + wb->inc.keys.nr)); in move_keys_from_inc_to_flushing()
232 darray_resize(&wb->sorted, wb->flushing.keys.size); in move_keys_from_inc_to_flushing()
234 if (!wb->flushing.keys.nr && wb->sorted.size >= wb->inc.keys.nr) { in move_keys_from_inc_to_flushing()
235 swap(wb->flushing.keys, wb->inc.keys); in move_keys_from_inc_to_flushing()
239 size_t nr = min(darray_room(wb->flushing.keys), in move_keys_from_inc_to_flushing()
240 wb->sorted.size - wb->flushing.keys.nr); in move_keys_from_inc_to_flushing()
243 memcpy(&darray_top(wb->flushing.keys), in move_keys_from_inc_to_flushing()
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| /linux/Documentation/admin-guide/hw-vuln/ |
| H A D | l1tf.rst | 148 'L1D vulnerable' L1D flushing is disabled
176 Flushing the L1D evicts not only the data which should not be accessed
178 data. Flushing the L1D has a performance impact as the processor has to
191 The conditional mode avoids L1D flushing after VMEXITs which execute
373 the hypervisors, i.e. unconditional L1D flushing
386 mitigation, i.e. conditional L1D flushing
395 i.e. conditional L1D flushing.
413 The default is 'flush'. For details about L1D flushing see :ref:`l1d_flush`.
421 The KVM hypervisor mitigation mechanism, flushing the L1D cache when
466 To avoid the overhead of the default L1D flushing on VMENTER the
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| H A D | l1d_flush.rst | 1 L1D Flushing
38 If the underlying CPU supports L1D flushing in hardware, the hardware
66 **NOTE** : The opt-in of a task for L1D flushing works only when the task's
68 requested L1D flushing is scheduled on a SMT-enabled core the kernel sends
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| /linux/Documentation/core-api/ |
| H A D | cachetlb.rst | 2 Cache and TLB Flushing Under Linux
7 This document describes the cache/tlb flushing interfaces called
17 thinking SMP cache/tlb flushing must be so inefficient, this is in
23 First, the TLB flushing interfaces, since they are the simplest. The
56 Here we are flushing a specific range of (user) virtual
108 Next, we have the cache flushing interfaces. In general, when Linux
130 The cache flushing routines below need only deal with cache flushing
165 Here we are flushing a specific range of (user) virtual
215 Here in these two interfaces we are flushing a specific range
343 Any necessary cache flushing or other coherency operations
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| /linux/fs/btrfs/ |
| H A D | space-info.c | 64 * MAKING RESERVATIONS, FLUSHING NORMALLY (non-priority)
93 * MAKING RESERVATIONS, FLUSHING HIGH PRIORITY
100 * THE FLUSHING STATES
417 * If we aren't flushing all things, let us overcommit up to in calc_available_free_space()
647 * flushing loops and hope for the best. Delalloc will expand in shrink_delalloc()
679 * marked clean. We don't use filemap_fwrite for flushing in shrink_delalloc()
725 * flushing so we can stop flushing if we decide we don't need in shrink_delalloc()
861 * We may be flushing because suddenly we have less space than we had in btrfs_calc_reclaim_metadata_size()
864 * appropriate pressure on the flushing state machine. in btrfs_calc_reclaim_metadata_size()
897 * that devoted to other reservations then there's no sense in flushing, in need_preemptive_reclaim()
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| /linux/arch/riscv/mm/ |
| H A D | cacheflush.c | 181 * riscv_set_icache_flush_ctx() - Enable/disable icache flushing instructions in
183 * @ctx: Set the type of icache flushing instructions permitted/prohibited in
195 * @scope: Set scope of where icache flushing instructions are allowed to be
209 * permitted to emit icache flushing instructions. Whenever any thread in the
213 * may attempt to execute, the other thread must still emit an icache flushing
218 * thread calling this function is permitted to emit icache flushing
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| /linux/arch/x86/include/asm/ |
| H A D | mmu.h | 31 * Any code that needs to do any sort of TLB flushing for this
34 * flushing code keep track of what needs flushing.
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| H A D | set_memory.h | 25 * - Flushing TLBs
26 * - Flushing CPU caches
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| /linux/arch/parisc/include/asm/ |
| H A D | tlbflush.h | 5 /* TLB flushing routines.... */
33 * and not flushing the whole tlb.
41 /* Except for very small threads, flushing the whole TLB is in flush_tlb_mm()
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| /linux/Documentation/arch/x86/ |
| H A D | pti.rst | 94 allows us to skip flushing the entire TLB when switching page
117 h. INVPCID is a TLB-flushing instruction which allows flushing
121 flushing a kernel address, we need to flush all PCIDs, so a
122 single kernel address flush will require a TLB-flushing CR3
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| /linux/arch/powerpc/mm/nohash/ |
| H A D | tlb.c | 3 * This file contains the routines for TLB flushing.
113 * Base TLB flushing operations:
126 * These are the base non-SMP variants of page and mm flushing
311 * Currently, for range flushing, we just do a full mm flush. This should
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| /linux/arch/openrisc/include/asm/ |
| H A D | cacheflush.h | 20 * Helper function for flushing or invalidating entire pages from data
28 * Data cache flushing always happen on the local cpu. Instruction cache
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| /linux/arch/arm/mm/ |
| H A D | mm.h | 15 * is reserved for VIPT aliasing flushing by generic code.
22 /* PFN alias flushing, for VIPT caches */
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| /linux/drivers/md/bcache/ |
| H A D | journal.h | 25 * moving gc we work around it by flushing the btree to disk before updating the
74 * If the journal fills up, we start flushing dirty btree nodes until we can
75 * allocate space for a journal write again - preferentially flushing btree
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| /linux/arch/powerpc/include/asm/nohash/ |
| H A D | tlbflush.h | 6 * TLB flushing:
19 * TLB flushing for software loaded TLB chips
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| /linux/mm/ |
| H A D | percpu-vm.c | 122 * unmapped. Flush cache. As each flushing trial can be very
180 * returned to vmalloc as vmalloc will handle TLB flushing lazily.
182 * As with pcpu_pre_unmap_flush(), TLB flushing also is done at once
252 * As with pcpu_pre_unmap_flush(), TLB flushing also is done at once
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| /linux/include/trace/events/ |
| H A D | jbd2.h | 261 __field( unsigned long, flushing )
275 __entry->flushing = stats->rs_flushing;
283 "locked %u flushing %u logging %u handle_count %u "
290 jiffies_to_msecs(__entry->flushing),
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| /linux/arch/sh/mm/ |
| H A D | tlbflush_32.c | 2 * TLB flushing operations for SH with an MMU.
130 * This is the most destructive of the TLB flushing options, in __flush_tlb_global()
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| /linux/arch/powerpc/mm/book3s32/ |
| H A D | tlb.c | 3 * This file contains the routines for TLB flushing.
33 * TLB flushing:
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| /linux/drivers/ssb/ |
| H A D | driver_gige.c | 212 /* Write flushing is controlled by the Flush Status Control register. in ssb_gige_probe()
214 * to disable the IRQ mask while flushing to avoid concurrency. in ssb_gige_probe()
215 * Note that automatic write flushing does _not_ work from in ssb_gige_probe()
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| /linux/drivers/gpu/drm/i915/gem/ |
| H A D | i915_gem_object_types.h | 144 * up over-flushing in some places.
436 * engine we only need to care about flushing any writes through the CPU
449 * flushing the surface just before doing the scanout. This does mean
507 * flushing might be needed at various points.
509 * Another part of @cache_dirty is managing flushing when first
516 * whether we actually need apply the big sledgehammer of flushing all
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| /linux/Documentation/networking/devlink/ |
| H A D | mlx5.rst | 149 Recover by flushing the tx queue and reset it.
152 Recover by flushing and re-creating all PTP channels.
182 Recover (if needed) by flushing the related queue and reset it.
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| /linux/arch/sh/include/asm/ |
| H A D | cacheflush.h | 8 * Cache flushing:
12 * - flush_cache_dup mm(mm) handles cache flushing when forking
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| /linux/fs/ceph/ |
| H A D | caps.c | 1406 int flushing, u64 flush_tid, u64 oldest_flush_tid) in __prep_cap() argument
1440 arg->follows = flushing ? ci->i_head_snapc->seq : 0; in __prep_cap()
1453 if (flushing & CEPH_CAP_XATTR_EXCL) { in __prep_cap()
1471 arg->dirty = flushing; in __prep_cap()
1545 " flushing %s tid %llu, requeuing cap.\n", in __send_cap()
1883 * Remove cap_flush from the mdsc's or inode's flushing cap list.
1917 * Add dirty inode to the flushing list. Assigned a seq number so we
1930 int flushing; in __mark_caps_flushing() local
1937 flushing = ci->i_dirty_caps; in __mark_caps_flushing()
1938 doutc(cl, "flushing %s, flushing_caps %s -> %s\n", in __mark_caps_flushing()
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| /linux/Documentation/block/ |
| H A D | writeback_cache_control.rst | 45 worry if the underlying devices need any explicit cache flushing and how
58 that it supports flushing caches by setting the
|