Searched full:flap (Results 1 – 12 of 12) sorted by relevance
63 - No reset allowed, no down time allowed, no link flap and no
80 * Status register during a slot reset which may cause them to flap
911 * propagated down to this hotplug port. Ignore the resulting link flap.
373 * no link flap and no configuration is lost.
240 * or link flap can be avoided.243 * Returns 0 if Link Flap Avoidance conditions are met otherwise, the failed261 DP(NETIF_MSG_LINK, "No LFA due to DCC flap after clp exit\n"); in bnx2x_check_lfa() 275 /* if loaded after BOOT from SAN, don't flap the link in any case and in bnx2x_check_lfa() 12873 /* Clear link flap reason */ in bnx2x_avoid_link_flap() 12932 /* Set link flap reason */ in bnx2x_cannot_avoid_link_flap() 12937 /* Increment link flap counter */ in bnx2x_cannot_avoid_link_flap() 12970 /* Check if link flap can be avoided */ in bnx2x_phy_init() 12974 DP(NETIF_MSG_LINK, "Link Flap Avoidance in progress\n"); in bnx2x_phy_init() 12978 DP(NETIF_MSG_LINK, "Cannot avoid link flap lfa_st in bnx2x_phy_init() [all...]
2301 /* Link Flap Avoidance */
832 /* Do hw update only if something changed to prevent nh flap */ in __prestera_k_arb_nc_apply()
4171 # cycle/flap the first ns-A interface4182 # cycle/flap the second ns-A interface
446 * autonomous check so it cannot flap the VF carrier. in enic_link_check()
4432 * link flap, we leave it untouched. in tg3_phy_copper_begin() 4925 * reset. If we have skipped a reset due to Link Flap in tg3_setup_copper_phy()
2105 * link flap. Otherwise configure the PHY based get PHY capabilities for
7512 * and its speed values are OK, no need for a flap in i40e_force_link_state()