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Searched full:fin_pll (Results 1 – 23 of 23) sorted by relevance

/linux/arch/arm/boot/dts/samsung/
H A Dexynos5260.dtsi116 clocks = <&fin_pll>,
120 clock-names = "fin_pll",
130 clocks = <&fin_pll>,
134 <&fin_pll>,
143 clock-names = "fin_pll",
162 clocks = <&fin_pll>,
164 clock-names = "fin_pll",
172 clocks = <&fin_pll>,
174 clock-names = "fin_pll",
182 clocks = <&fin_pll>,
[all …]
H A Ds3c6410-smdk6410.dts31 fin_pll: oscillator-0 { label
34 clock-output-names = "fin_pll";
65 clocks = <&fin_pll>;
H A Ds3c6410-mini6410.dts31 fin_pll: oscillator-0 { label
34 clock-output-names = "fin_pll";
161 clocks = <&fin_pll>;
H A Dexynos5260-xyref5260.dts30 fin_pll: xxti { label
33 clock-output-names = "fin_pll";
H A Dexynos5410-smdk5410.dts30 fin_pll: xxti { label
33 clock-output-names = "fin_pll";
H A Dexynos5410-odroidxu.dts51 fin_pll: xxti { label
54 clock-output-names = "fin_pll";
104 clocks = <&fin_pll>;
H A Dexynos4210.dtsi287 clock-names = "fin_pll", "mct";
H A Dexynos4x12.dtsi300 clock-names = "fin_pll", "mct";
H A Dexynos3250.dtsi456 clock-names = "fin_pll", "mct";
H A Dexynos5420.dtsi1292 clock-names = "fin_pll", "mct";
/linux/drivers/clk/samsung/
H A Dclk-fsd.c173 PLL(pll_142xx, 0, "fout_pll_shared0", "fin_pll", PLL_LOCKTIME_PLL_SHARED0,
175 PLL(pll_142xx, 0, "fout_pll_shared1", "fin_pll", PLL_LOCKTIME_PLL_SHARED1,
177 PLL(pll_142xx, 0, "fout_pll_shared2", "fin_pll", PLL_LOCKTIME_PLL_SHARED2,
179 PLL(pll_142xx, 0, "fout_pll_shared3", "fin_pll", PLL_LOCKTIME_PLL_SHARED3,
184 PNAME(mout_cmu_shared0_pll_p) = { "fin_pll", "fout_pll_shared0" };
185 PNAME(mout_cmu_shared1_pll_p) = { "fin_pll", "fout_pll_shared1" };
186 PNAME(mout_cmu_shared2_pll_p) = { "fin_pll", "fout_pll_shared2" };
187 PNAME(mout_cmu_shared3_pll_p) = { "fin_pll", "fout_pll_shared3" };
188 PNAME(mout_cmu_cis0_clkmux_p) = { "fin_pll", "dout_cmu_pll_shared0_div4" };
189 PNAME(mout_cmu_cis1_clkmux_p) = { "fin_pll", "dout_cmu_pll_shared0_div4" };
[all …]
H A Dclk-artpec8.c179 PLL(pll_1017x, CLK_FOUT_SHARED0_PLL, "fout_pll_shared0", "fin_pll",
181 PLL(pll_1017x, CLK_FOUT_SHARED1_PLL, "fout_pll_shared1", "fin_pll",
183 PLL(pll_1031x, CLK_FOUT_AUDIO_PLL, "fout_pll_audio", "fin_pll",
239 PNAME(mout_clkcmu_pll_shared0_p) = { "fin_pll", "fout_pll_shared0" };
240 PNAME(mout_clkcmu_pll_shared1_p) = { "fin_pll", "fout_pll_shared1" };
241 PNAME(mout_clkcmu_pll_audio_p) = { "fin_pll", "fout_pll_audio" };
244 FFACTOR(CLK_DOUT_CMU_OTP, "dout_clkcmu_otp", "fin_pll", 1, 8, 0),
388 PNAME(mout_clk_bus_aclk_user_p) = { "fin_pll", "dout_clkcmu_bus" };
389 PNAME(mout_clk_bus_dlp_user_p) = { "fin_pll", "dout_clkcmu_bus_dlp" };
424 PNAME(mout_clk_core_aclk_user_p) = { "fin_pll", "dout_clkcmu_core_main" };
[all …]
H A Dclk-exynos5420.c300 PNAME(mout_apll_p) = {"fin_pll", "fout_apll"};
301 PNAME(mout_bpll_p) = {"fin_pll", "fout_bpll"};
302 PNAME(mout_cpll_p) = {"fin_pll", "fout_cpll"};
303 PNAME(mout_dpll_p) = {"fin_pll", "fout_dpll"};
304 PNAME(mout_epll_p) = {"fin_pll", "fout_epll"};
305 PNAME(mout_ipll_p) = {"fin_pll", "fout_ipll"};
306 PNAME(mout_kpll_p) = {"fin_pll", "fout_kpll"};
307 PNAME(mout_mpll_p) = {"fin_pll", "fout_mpll"};
308 PNAME(mout_rpll_p) = {"fin_pll", "fout_rpll"};
309 PNAME(mout_spll_p) = {"fin_pll", "fout_spll"};
[all …]
H A Dclk-exynos5250.c173 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
176 PNAME(mout_mpll_p) = { "fin_pll", "mout_mpll_fout" };
178 PNAME(mout_bpll_p) = { "fin_pll", "mout_bpll_fout" };
179 PNAME(mout_vpllsrc_p) = { "fin_pll", "sclk_hdmi27m" };
181 PNAME(mout_cpll_p) = { "fin_pll", "fout_cpll" };
182 PNAME(mout_epll_p) = { "fin_pll", "fout_epll" };
183 PNAME(mout_gpll_p) = { "fin_pll", "fout_gpll" };
184 PNAME(mout_mpll_user_p) = { "fin_pll", "mout_mpll" };
185 PNAME(mout_bpll_user_p) = { "fin_pll", "mout_bpll" };
191 PNAME(mout_aclk200_sub_p) = { "fin_pll", "div_aclk200" };
[all …]
H A Dclk-exynos3250.c176 PNAME(mout_vpllsrc_p) = { "fin_pll", };
178 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
179 PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", };
180 PNAME(mout_vpll_p) = { "fin_pll", "fout_vpll", };
181 PNAME(mout_upll_p) = { "fin_pll", "fout_upll", };
183 PNAME(mout_mpll_user_p) = { "fin_pll", "div_mpll_pre", };
184 PNAME(mout_epll_user_p) = { "fin_pll", "mout_epll", };
195 = { "fin_pll", "div_aclk_400_mcuisp", };
199 PNAME(mout_aclk_266_sub_p) = { "fin_pll", "div_aclk_266", };
235 /* HACK: fin_pll hardcoded to xusbxti until detection is implemented. */
[all …]
H A Dclk-exynos4.c282 PNAME(mout_apll_p) = { "fin_pll", "fout_apll", };
283 PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", };
284 PNAME(mout_epll_p) = { "fin_pll", "fout_epll", };
285 PNAME(mout_vpllsrc_p) = { "fin_pll", "sclk_hdmi24m", };
286 PNAME(mout_vpll_p) = { "fin_pll", "fout_vpll", };
338 PNAME(mout_mpll_user_p4x12) = { "fin_pll", "sclk_mpll", };
356 PNAME(mout_user_aclk400_mcuisp_p4x12) = {"fin_pll", "div_aclk400_mcuisp", };
357 PNAME(mout_user_aclk200_p4x12) = {"fin_pll", "div_aclk200", };
358 PNAME(mout_user_aclk266_gps_p4x12) = {"fin_pll", "div_aclk266_gps", };
1013 * The parent of the fin_pll clock is selected by the XOM[0] bit. This bit
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H A Dclk-exynos-audss.c125 const char *mout_audss_p[] = {"fin_pll", "fout_epll"}; in exynos_audss_clk_probe()
/linux/Documentation/devicetree/bindings/clock/
H A Dtesla,fsd-clock.yaml59 - const: fin_pll
76 - const: fin_pll
98 - const: fin_pll
120 - const: fin_pll
139 - const: fin_pll
155 - const: fin_pll
169 - const: fin_pll
190 clocks = <&fin_pll>,
193 clock-names = "fin_pll",
H A Daxis,artpec8-clock.yaml74 - const: fin_pll
91 - const: fin_pll
110 - const: fin_pll
128 - const: fin_pll
148 - const: fin_pll
169 - const: fin_pll
189 - const: fin_pll
205 clocks = <&fin_pll>,
210 clock-names = "fin_pll", "scan0", "scan1", "bus", "ip";
H A Dsamsung,s3c6400-clock.yaml16 - "fin_pll" - PLL input clock (xtal/extclk) - required,
56 clocks = <&fin_pll>;
H A Dsamsung,exynos-audss-clock.yaml31 Fixed rate PLL reference clock, parent of mout_audss. "fin_pll" is
/linux/Documentation/devicetree/bindings/timer/
H A Dsamsung,exynos4210-mct.yaml48 - const: fin_pll
176 clock-names = "fin_pll", "mct";
196 clock-names = "fin_pll", "mct";
217 clock-names = "fin_pll", "mct";
237 clock-names = "fin_pll", "mct";
/linux/include/dt-bindings/clock/
H A Ds5pv210.h13 #define FIN_PLL 1 macro