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/linux/Documentation/admin-guide/hw-vuln/
H A Drsb.rst53 poisoned RSB entries using an RSB filling sequence
54 [#intel-rsb-filling]_ [#amd-rsb-filling]_ when transitioning between
72 On Zen < 4, the RSB filling sequence [#amd-rsb-filling]_ must be
160 * Note that RSB filling doesn't fully mitigate this issue. If there
226 .. [#intel-rsb-filling] "Empty RSB Mitigation on Skylake-generation" in `Retpoline: A Branch Target…
228 .. [#amd-rsb-filling] "Mitigation V2-3" in `Software Techniques for Managing Speculation <https://w…
/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A Dcache.json86 "BriefDescription": "L2 cache lines filling L2",
90 "PublicDescription": "L2 cache lines filling L2.",
95 "BriefDescription": "L2 cache lines in E state filling L2",
99 "PublicDescription": "L2 cache lines in E state filling L2.",
104 "BriefDescription": "L2 cache lines in I state filling L2",
108 "PublicDescription": "L2 cache lines in I state filling L2.",
113 "BriefDescription": "L2 cache lines in S state filling L2",
117 "PublicDescription": "L2 cache lines in S state filling L2.",
140 "BriefDescription": "Dirty L2 cache lines filling the L2",
144 "PublicDescription": "Dirty L2 cache lines filling the L2.",
/linux/tools/perf/pmu-events/arch/x86/ivytown/
H A Dcache.json86 "BriefDescription": "L2 cache lines filling L2",
90 "PublicDescription": "L2 cache lines filling L2.",
95 "BriefDescription": "L2 cache lines in E state filling L2",
99 "PublicDescription": "L2 cache lines in E state filling L2.",
104 "BriefDescription": "L2 cache lines in I state filling L2",
108 "PublicDescription": "L2 cache lines in I state filling L2.",
113 "BriefDescription": "L2 cache lines in S state filling L2",
117 "PublicDescription": "L2 cache lines in S state filling L2.",
140 "BriefDescription": "Dirty L2 cache lines filling the L2",
144 "PublicDescription": "Dirty L2 cache lines filling the L2.",
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A Dcache.json59 "BriefDescription": "L2 cache lines filling L2",
63 "PublicDescription": "This event counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",
68 "BriefDescription": "L2 cache lines in E state filling L2",
72 "PublicDescription": "This event counts the number of L2 cache lines in the Exclusive state filling the L2. Counting does not cover rejects.",
77 "BriefDescription": "L2 cache lines in I state filling L2",
81 "PublicDescription": "This event counts the number of L2 cache lines in the Invalidate state filling the L2. Counting does not cover rejects.",
86 "BriefDescription": "L2 cache lines in S state filling L2",
90 "PublicDescription": "This event counts the number of L2 cache lines in the Shared state filling the L2. Counting does not cover rejects.",
/linux/tools/perf/pmu-events/arch/x86/broadwellx/
H A Dcache.json59 "BriefDescription": "L2 cache lines filling L2",
63 "PublicDescription": "This event counts the number of L2 cache lines filling the L2. Counting does not cover rejects.",
68 "BriefDescription": "L2 cache lines in E state filling L2",
72 "PublicDescription": "This event counts the number of L2 cache lines in the Exclusive state filling the L2. Counting does not cover rejects.",
77 "BriefDescription": "L2 cache lines in I state filling L2",
81 "PublicDescription": "This event counts the number of L2 cache lines in the Invalidate state filling the L2. Counting does not cover rejects.",
86 "BriefDescription": "L2 cache lines in S state filling L2",
90 "PublicDescription": "This event counts the number of L2 cache lines in the Shared state filling the L2. Counting does not cover rejects.",
/linux/tools/perf/pmu-events/arch/x86/haswell/
H A Dcache.json66 "BriefDescription": "L2 cache lines filling L2",
75 "BriefDescription": "L2 cache lines in E state filling L2",
79 "PublicDescription": "L2 cache lines in E state filling L2.",
84 "BriefDescription": "L2 cache lines in I state filling L2",
88 "PublicDescription": "L2 cache lines in I state filling L2.",
93 "BriefDescription": "L2 cache lines in S state filling L2",
97 "PublicDescription": "L2 cache lines in S state filling L2.",
/linux/tools/perf/pmu-events/arch/x86/haswellx/
H A Dcache.json66 "BriefDescription": "L2 cache lines filling L2",
75 "BriefDescription": "L2 cache lines in E state filling L2",
79 "PublicDescription": "L2 cache lines in E state filling L2.",
84 "BriefDescription": "L2 cache lines in I state filling L2",
88 "PublicDescription": "L2 cache lines in I state filling L2.",
93 "BriefDescription": "L2 cache lines in S state filling L2",
97 "PublicDescription": "L2 cache lines in S state filling L2.",
/linux/arch/x86/kvm/vmx/
H A Dvmenter.S275 * IMPORTANT: RSB filling and SPEC_CTRL handling must be done before
278 * For retpoline or IBRS, RSB filling is needed to prevent poisoned RSB
282 * need the RSB filling sequence. But it does need to be enabled, and a
/linux/Documentation/ABI/testing/
H A Dconfigfs-acpi28 after the table has been loaded by filling the aml entry:
/linux/include/net/libeth/
H A Dxsk.h159 * @priv: &libeth_xdp_tx_desc from the filling helper
162 * require filling checksum offsets and other parameters beside the checksum
276 * HW descriptor filling is unrolled by ``LIBETH_XDP_TX_BATCH`` to optimize
430 * @prep: callback for filling the metadata
H A Dxdp.h498 * @unroll: whether to unroll the queue filling loop for speed
500 * @prep: callback for cleaning the queue and filling abstract &libeth_xdpsq
501 * @fill: internal callback for filling &libeth_sqe and &libeth_xdp_tx_desc
502 * @xmit: callback for filling a HW descriptor with the frame info
681 * Internal helper for filling an SQE with the frame stats, do not use in
1451 * @prep: callback for filling the metadata
1705 * Often times, pointer to the RQ is needed when reading/filling metadata from
/linux/include/linux/platform_data/media/
H A Dsi4713.h43 * Driver must return measured value in the same structure, filling 'rnl' field.
/linux/include/media/
H A Dvideobuf2-dvb.h22 /* filling that the job of the driver */
/linux/Documentation/core-api/
H A Dcircular-buffers.rst123 producer may still be filling the buffer on another CPU and moving the
146 consumer that empties it. Only one thing should be filling a buffer at any one
/linux/drivers/scsi/libfc/
H A Dfc_libfc.c148 * @in_fp: request frame containing header to use in filling in reply
206 * @in_fp: request frame containing header to use in filling in reply
/linux/drivers/staging/media/atomisp/
H A Dnotes.txt16 different binaries. Binaries are picked by filling a ia_css_binary_descr
/linux/fs/jffs2/
H A Dread.c185 jffs2_dbg(1, "Filling non-frag hole from %d-%d\n", in jffs2_read_inode_range()
193 jffs2_dbg(1, "Filling frag hole from %d-%d (frag 0x%x 0x%x)\n", in jffs2_read_inode_range()
/linux/drivers/media/usb/pvrusb2/
H A Dpvrusb2-io.h17 pvr2_buffer_state_queued = 2, // Buffer has been queued for filling
/linux/drivers/net/ethernet/intel/ice/
H A Dice_gnss.c200 * Open GNSS device and start filling the read buffer for consumer.
230 * Close GNSS device, cancel worker, stop filling the read buffer.
/linux/Documentation/arch/arm/
H A Dfirmware.rst12 Firmware operations can be specified by filling in a struct firmware_ops
/linux/tools/perf/pmu-events/arch/x86/jaketown/
H A Dcache.json121 "BriefDescription": "L2 cache lines filling L2.",
130 "BriefDescription": "L2 cache lines in E state filling L2.",
138 "BriefDescription": "L2 cache lines in I state filling L2.",
146 "BriefDescription": "L2 cache lines in S state filling L2.",
170 "BriefDescription": "Dirty L2 cache lines filling the L2.",
/linux/drivers/char/hw_random/
H A Dst-rng.c37 * thorough testing, it became apparent that filling the FIFO actually
/linux/lib/
H A Dklist.c274 * @i: klist_iter we're filling.
293 * @i: klist_iter structure we're filling.
/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_ifh.h28 /* Cell filling mode. Full(0),Etype(1), LlctOpt(2), Llct(3) */
/linux/kernel/trace/
H A Dsynth_event_gen_test.c313 * then filling in fields one after another.
368 * then filling in fields using field names, which can be done in any

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