Searched full:fig (Results 1 – 17 of 17) sorted by relevance
42 "Serial clock generator" in fig. "Clock System Overview" of the manual,76 fig. "Clock System Overview" of the manual.
130 early boot (See Fig. 2). This area is released once we finish138 usually reserved at an offset greater than boot memory size (see Fig. 1).180 Fig. 1216 Fig. 2
37 The flowtable datapath is represented in Fig.1, which describes the classic IP70 Fig.1 Netfilter hooks and flowtable interactions
63 Fig 1.
77 collection and processing. See Fig 14 and 15 in the datasheet.
313 * See Fig 3-6 "Queue Element Transfer Descriptor Block Diagram".403 * See Fig 3-7 "Queue Head Structure Layout".537 * Fig 3-4 "Isochronous Transaction Descriptor (iTD)"
22 sodipodi:docname="TreeMapping.fig">
22 sodipodi:docname="BigTreeClassicRCU.fig">
22 sodipodi:docname="HugeTreeClassicRCU.fig">
22 sodipodi:docname="TreeLevel.fig">
19 as written down in Fig.17 of the paper.
476 /* termination, output buffers may be modified, SPBC/TPBC invalid Fig.6-7 */
346 - ``.fig`` for XFIG graphics and
496 * - Fig. "Control Transfer Stage Transitions" in usbhsg_irq_ctrl_stage()
738 * Fig.6-7 and Table 6-8. in decompress_file()
343 * See the EHCI spec sec 4.5 and fig 4.7.347 * in USB 2.0 spec section 11.18.1 fig 11-60.
4645 /* USB 2.0 spec, 7.1.7.3 / fig 7-29:
