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/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Dnvidia,tegra20-i2c.txt4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
14 "nvidia,tegra20-i2c-dvc".
15 nvidia,tegra20-i2c: Tegra20 has 4 generic I2C controller. This can support
16 master and slave mode of I2C communication. The i2c-tegra driver only
18 only compatible with "nvidia,tegra20-i2c".
19 nvidia,tegra30-i2c: Tegra30 has 5 generic I2C controller. This controller is
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H A Dnvidia,tegra20-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <thierry.reding@gmail.com>
9 - Jon Hunter <jonathanh@nvidia.com>
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
19 controller is only compatible with "nvidia,tegra20-i2c".
20 const: nvidia,tegra20-i2c
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos7885-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos7885 SoC pin-mux and pin-config device tree source
8 * Samsung's Exynos7885 SoC pin-mux and pin-config options are listed as
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "exynos-pinctrl.h"
16 etc0: etc0-gpio-bank {
17 gpio-controller;
18 #gpio-cells = <2>;
20 interrupt-controller;
21 #interrupt-cells = <2>;
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/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Dste-u300-syscon-clock.txt1 Clock bindings for ST-Ericsson U300 System Controller Clocks
6 - compatible: must be "stericsson,u300-syscon-clk"
7 - #clock-cells: must be <0>
8 - clock-type: specifies the type of clock:
10 1 = fast clock
12 - clock-id: specifies the clock in the type range
15 - clocks: parent clock(s)
20 -------------------
28 1 0 Fast peripheral bridge clock
46 #clock-cells = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,nvec.txt4 - compatible : should be "nvidia,nvec".
5 - reg : the iomem of the i2c slave controller
6 - interrupts : the interrupt line of the i2c slave controller
7 - clock-frequency : the frequency of the i2c bus
8 - gpios : the gpio used for ec request
9 - slave-addr: the i2c address of the slave controller
10 - clocks : Must contain an entry for each entry in clock-names.
11 See ../clocks/clock-bindings.txt for details.
12 - clock-names : Must include the following entries:
14 - div-clk
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/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-ast2600-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "aspeed,ast2600-evb", "aspeed,ast2600";
26 reserved-memory {
27 #address-cells = <1>;
28 #size-cells = <1>;
34 compatible = "shared-dma-pool";
41 compatible = "shared-dma-pool";
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H A Daspeed-bmc-opp-nicole.dts1 // SPDX-License-Identifier: GPL-2.0+
3 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
9 compatible = "yadro,nicole-bmc", "aspeed,ast2500";
12 stdout-path = &uart5;
20 reserved-memory {
21 #address-cells = <1>;
22 #size-cells = <1>;
26 no-map;
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/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-apq8026-lg-lenok.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include "qcom-msm8226.dtsi"
10 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
12 /delete-node/ &adsp_region;
17 chassis-type = "watch";
18 qcom,board-id = <132 0x0a>;
19 qcom,msm-id = <199 0x20000>;
27 stdout-path = "serial0:115200n8";
30 reserved-memory {
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H A Dqcom-msm8974-sony-xperia-rhine.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
15 stdout-path = "serial0:115200n8";
18 gpio-key
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H A Dqcom-msm8974pro-fairphone-fp2.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-msm8974pro.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/leds/common.h>
7 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
12 chassis-type = "handset";
21 stdout-pat
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/freebsd/sys/dev/iicbus/controller/twsi/
H A Dmv_twsi.c1 /*-
36 * Calls to DELAY() are needed per Application Note AN-179 "TWSI Software
61 #include <dev/clk/clk.h>
99 { "marvell,mv64xxx-i2c", true },
100 { "marvell,mv78230-i2c", true },
138 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) in mv_twsi_probe()
145 #define ABSSUB(a,b) (((a) > (b)) ? (a) - (b) : (b) - (a))
150 uint64_t clk; in mv_twsi_cal_baud_rate() local
157 clk_get_freq(sc->clk_core, &clk); in mv_twsi_cal_baud_rate()
161 cur = TWSI_BAUD_RATE_RAW(clk,m,n); in mv_twsi_cal_baud_rate()
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/freebsd/sys/contrib/device-tree/Bindings/iio/frequency/
H A Dadf4350.txt4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
21 - adi,reference-div2-enable: Enables reference divider.
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H A Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
31 '#clock-cells':
34 clock-output-names:
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/freebsd/sys/arm/nvidia/tegra124/
H A Dtegra124_clk_pll.c1 /*-
36 #include <dev/clk/clk.h>
38 #include <dt-bindings/clock/tegra124-car.h>
88 /* Post divider <-> register value mapping. */
125 PLLX: Clock source for the fast CPU cluster and the shadow CPU
139 DFLLCPU: DFLL clock source for the fast CPU cluster
227 /* PLLX: 1GHz Clock source for the fast CPU cluster and the shadow CPU */
380 static int tegra124_pll_init(struct clknode *clk, device_t dev);
381 static int tegra124_pll_set_gate(struct clknode *clk, bool enable);
382 static int tegra124_pll_get_gate(struct clknode *clk, bool *enabled);
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mq-kontron-pitx-imx8m.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree File for the Kontron pitx-imx8m board.
8 /dts-v1/;
11 #include <dt-bindings/net/ti-dp83867.h>
14 model = "Kontron pITX-imx8m";
15 compatible = "kontron,pitx-imx8m", "fsl,imx8mq";
31 stdout-pat
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H A Dimx8mm-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mm-data-modul-edm-sbc", "fsl,imx8mm";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-binding
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H A Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20-mc.h>
5 #include <dt-binding
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/freebsd/sys/riscv/conf/
H A DGENERIC2 # GENERIC -- Generic kernel configuration file for FreeBSD/RISC-V
7 # https://docs.freebsd.org/en/books/handbook/kernelconfig/#kernelconfig-config
23 makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols
36 options TCP_RFC7413 # TCP Fast Open
38 options FFS # Berkeley Fast Filesystem
42 options UFS_GJOURNAL # Enable gjournal-based UFS journaling
51 options PSEUDOFS # Pseudo-filesystem framework
61 options SYSVSHM # SYSV-style shared memory
62 options SYSVMSG # SYSV-style message queues
63 options SYSVSEM # SYSV-style semaphores
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/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-37xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
25 reserved-memory {
26 #address-cells = <2>;
27 #size-cells = <2>;
34 psci-area@4000000 {
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/freebsd/sys/contrib/device-tree/src/arm64/intel/
H A Dsocfpga_n5x_socdk.dts1 // SPDX-License-Identifier: GPL-2.0
9 compatible = "intel,n5x-socdk", "intel,socfpga-agilex";
19 stdout-path = "serial0:115200n8";
29 sdram_edac: memory-controller@f87f8000 {
30 compatible = "snps,ddrc-3.80a";
38 compatible = "intel,easic-n5x-clkmgr";
43 phy-mode = "rgmii";
44 phy-handle = <&phy0>;
46 max-frame-size = <9000>;
49 #address-cells = <1>;
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H A Dsocfpga_agilex_socdk.dts1 // SPDX-License-Identifier: GPL-2.0
9 compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex";
19 stdout-path = "serial0:115200n8";
23 compatible = "gpio-leds";
53 phy-mode = "rgmii";
54 phy-handle = <&phy0>;
56 max-frame-size = <9000>;
59 #address-cells = <1>;
60 #size-cells = <0>;
61 compatible = "snps,dwmac-mdio";
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/google/
H A Dgs101-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * GS101 SoC pin-mux and pin-config device tree source
5 * Copyright 2019-2023 Google LLC
6 * Copyright 2023 Linaro Ltd - <peter.griffin@linaro.org>
9 #include "gs101-pinctrl.h"
12 gpa0: gpa0-gpio-bank {
13 gpio-controller;
14 #gpio-cells = <2>;
15 interrupt-controller;
16 #interrupt-cells = <2>;
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/freebsd/sys/contrib/device-tree/src/mips/img/
H A Dpistachio.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
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/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam335x-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/interrupt-controller/irq.h>
12 compatible = "phytec,am335x-phycore-som", "ti,am33xx";
22 cpu0-supply = <&vdd1_reg>;
32 compatible = "regulator-fixed";
33 regulator-name = "vcc5v";
34 regulator-min-microvolt = <5000000>;
35 regulator-max-microvolt = <5000000>;
36 regulator-boot-on;
37 regulator-always-on;
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