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/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,xsphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek XS-PHY Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The XS-PHY controller supports physical layer functionality for USB3.1
18 ----------------------------------
45 pattern: "^xs-phy@[0-9a-f]+$"
49 - enum:
50 - mediatek,mt3611-xsphy
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H A Dmediatek,tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek T-PHY Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The T-PHY controller supports physical layer functionality for a number of
17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode:
19 -----------------------------------
67 pattern: "^t-phy(@[0-9a-f]+)?$"
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/linux/drivers/phy/
H A Dphy-xgene.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * AppliedMicro X-Gene Multi-purpose PHY driver
10 * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes.
19 * -----------------
20 * | Internal | |------|
21 * | Ref PLL CMU |----| | ------------- ---------
22 * ------------ ---- | MUX |-----|PHY PLL CMU|----| Serdes|
23 * | | | | ---------
24 * External Clock ------| | -------------
25 * |------|
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/linux/Documentation/userspace-api/media/v4l/
H A Dmetafmt-d4xx.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
4 .. _v4l2-meta-fmt-d4xx:
16 Intel D4xx (D435, D455 and others) cameras include per-frame metadata in their UVC
38 .. flat-table:: D4xx metadata
40 :header-rows: 1
41 :stub-columns: 0
43 * - **Field**
44 - **Description**
45 * - :cspan:`1` *Depth Control*
46 * - __u32 ID
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/linux/drivers/phy/hisilicon/
H A Dphy-hi3670-pcie.c1 // SPDX-License-Identifier: GPL-2.0
175 writel(val, phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_writel()
180 return readl(phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_readl()
197 writel(val, phy->base + reg); in kirin_apb_natural_phy_writel()
203 return readl(phy->base + reg); in kirin_apb_natural_phy_readl()
210 regmap_read(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, &val); in hi3670_pcie_phy_oe_enable()
216 regmap_write(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, val); in hi3670_pcie_phy_oe_enable()
221 struct device *dev = phy->dev; in hi3670_pcie_get_eyeparam()
225 np = dev->of_node; in hi3670_pcie_get_eyeparam()
227 ret = of_property_read_u32_array(np, "hisilicon,eye-diagram-param", in hi3670_pcie_get_eyeparam()
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/linux/fs/nfs/
H A Dwrite.c1 // SPDX-License-Identifier: GPL-2.0-only
23 #include <linux/backing-dev.h>
83 INIT_LIST_HEAD(&p->pages); in nfs_commitdata_alloc()
105 p->rw_mode = FMODE_WRITE; in nfs_writehdr_alloc()
122 ioc->complete = complete; in nfs_io_completion_init()
123 ioc->data = data; in nfs_io_completion_init()
124 kref_init(&ioc->refcount); in nfs_io_completion_init()
131 ioc->complete(ioc->data); in nfs_io_completion_release()
138 kref_get(&ioc->refcount); in nfs_io_completion_get()
144 kref_put(&ioc->refcount, nfs_io_completion_release); in nfs_io_completion_put()
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/linux/rust/quote/
H A Dlib.rs1 // SPDX-License-Identifier: Apache-2.0 OR MIT
3 …]](https://github.com/dtolnay/quote)&ensp;[![crates-io]](https://crates.io/crates/quote)&ensp;[![d…
5 //! [github]: https://img.shields.io/badge/github-8da0cb?style=for-the-badge&labelColor=555555&logo…
6 //! [crates-io]: https://img.shields.io/badge/crates.io-fc8d62?style=for-the-badge&labelColor=55555…
7 //! [docs-rs]: https://img.shields.io/badge/docs.rs-66c2a5?style=for-the-badge&labelColor=555555&lo…
17 //! crate. Quasi-quoting is a solution to one piece of that &mdash; producing
20 //! The idea of quasi-quoting is that we write *code* that we treat as *data*.
29 //! general-purpose Rust quasi-quoting library and is not specific to procedural
41 //! The following quasi-quoted block of code is something you might find in [a]
67 //! fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
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/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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/linux/drivers/md/
H A Draid5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * RAID-4/5/6 management functions.
9 * Thanks to Penguin Computing for making the RAID-6 development possible
22 * conf->seq_write is the number of the last batch successfully written.
23 * conf->seq_flush is the number of the last batch that was closed to
26 * (in add_stripe_bio) we update the in-memory bitmap and record in sh->bm_seq
56 #include "md-bitmap.h"
57 #include "raid5-log.h"
81 return &conf->stripe_hashtbl[hash]; in stripe_hash()
90 __acquires(&conf->device_lock) in lock_device_hash_lock()
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