Home
last modified time | relevance | path

Searched +full:exynos7 +full:- +full:i2s (Results 1 – 5 of 5) sorted by relevance

/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dsamsung-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC I2S controlle
[all...]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dsamsung,exynos5433-lpass.txt5 - compatible : "samsung,exynos5433-lpass"
6 - reg : should contain the LPASS top SFR region location
8 - clock-names : should contain following required clocks: "sfr0_ctrl"
9 - clocks : should contain clock specifiers of all clocks, which
10 input names have been specified in clock-names
12 - #address-cells : should be 1
13 - #size-cells : should be 1
14 - ranges : must be present
17 an optional sub-node. For "samsung,exynos5433-lpass" compatible this includes:
18 UART, SLIMBUS, PCM, I2S, DMAC, Timers 0...4, VIC, WDT 0...1 devices.
[all …]
H A Dsamsung,exynos5433-lpass.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/samsung,exynos5433-lpas
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/tesla/
H A Dfsd.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Tesla Full Self-Driving SoC device tree source
5 * Copyright (c) 2017-2022 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2017-2022 Tesla, Inc.
11 #include <dt-bindings/clock/fsd-clk.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
38 #address-cells = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
[all …]