Searched +full:exynos7 +full:- +full:clk (Results 1 – 16 of 16) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | samsung,exynos7-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/samsung,exynos7-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos7 SoC clock controller 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 - Tomasz Figa <tomasz.figa@gmail.com> 16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching [all …]
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H A D | exynos7-clock.txt | 1 * Samsung Exynos7 Clock Controller 3 Exynos7 clock controller has various blocks which are instantiated 4 independently from the device-tree. These clock controllers 11 dt-bindings/clock/exynos7-clk.h header and can be used in 18 with following clock-output-names: 20 - "fin_pll" - PLL input clock from XXTI 24 - compatible: clock controllers will use one of the following 28 - "samsung,exynos7-clock-topc" 29 - "samsung,exynos7-clock-top0" 30 - "samsung,exynos7-clock-top1" [all …]
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/freebsd/sys/contrib/device-tree/Bindings/display/samsung/ |
H A D | samsung,exynos7-decon.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos7-decon.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos7 SoC Display and Enhancement Controller (DECON) 10 - Inki Dae <inki.dae@samsung.com> 11 - Seung-Woo Kim <sw0312.kim@samsung.com> 12 - Kyungmin Park <kyungmin.park@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 17 Exynos7 series of SoCs which transfers the image data from a video memory [all …]
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/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | samsung-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylweste [all...] |
/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-samsung.txt | 8 - compatible: should be one of the following. 9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms 10 - samsung,s3c6410-spi: for s3c6410 platforms 11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms 12 - samsung,exynos5433-spi: for exynos5433 compatible controllers 13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED> 15 - reg: physical base address of the controller and length of memory mapped 18 - interrupts: The interrupt number to the cpu. The interrupt specifier format 21 - dmas : Two or more DMA channel specifiers following the convention outlined 24 - dma-names: Names for the dma channels. There must be at least one channel [all …]
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H A D | samsung,spi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 19 - enum: 20 - google,gs101-spi 21 - samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450 22 - samsung,s3c6410-spi 23 - samsung,s5pv210-spi # for S5PV210 and S5PC110 24 - samsung,exynos4210-spi [all …]
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/freebsd/sys/contrib/device-tree/Bindings/phy/ |
H A D | samsung,ufs-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/samsung,ufs-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alim Akhtar <alim.akhtar@samsung.com> 13 "#phy-cells": 18 - google,gs101-ufs-phy 19 - samsung,exynos7-ufs-phy 20 - samsung,exynosautov9-ufs-phy 21 - tesla,fsd-ufs-phy [all …]
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/freebsd/sys/contrib/device-tree/Bindings/ufs/ |
H A D | samsung,exynos-ufs.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/ufs/samsung,exynos-ufs.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Alim Akhtar <alim.akhtar@samsung.com> 18 - google,gs101-ufs 19 - samsung,exynos7-ufs 20 - samsung,exynosautov9-ufs 21 - samsung,exynosautov9-ufs-vh 22 - tesla,fsd-ufs [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
H A D | exynos7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung Exynos7 SoC device tree source 9 #include <dt-bindings/clock/exynos7-clk.h> 10 #include <dt-bindings/interrupt-controlle [all...] |
H A D | exynos5433.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 16 #include <dt-bindings/clock/exynos5433.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 21 #address-cells = <2>; 22 #size-cells = <2>; 24 interrupt-parent = <&gic>; 26 arm-a53-pmu { 27 compatible = "arm,cortex-a53-pmu"; 32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 35 arm-a57-pmu { [all …]
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H A D | exynos7-espresso.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung Exynos7 Espresso board device tree source 9 /dts-v1/; 10 #include "exynos7.dtsi" 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/samsung,s2mps11.h> 13 #include <dt-bindings/gpio/gpio.h> 16 model = "Samsung Exynos7 Espresso board based on Exynos7"; 17 compatible = "samsung,exynos7-espresso", "samsung,exynos7"; 26 stdout-path = &serial_2; [all …]
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H A D | exynos850.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <dt-bindings/clock/exynos850.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/soc/samsung,exynos-usi.h> 20 #address-cells = <2>; 21 #size-cells = <1>; 23 interrupt-parent = <&gic>; 34 arm-pmu { 35 compatible = "arm,cortex-a55-pmu"; 44 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>, [all …]
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H A D | exynos7-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos7 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos7 SoC pin-mux and pin-config options are listed as 12 #include "exynos-pinctrl.h" 15 gpa0: gpa0-gpio-bank { 16 gpio-controller; 17 #gpio-cells = <2>; 19 interrupt-controller; 20 interrupt-parent = <&gic>; 21 #interrupt-cells = <2>; [all …]
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H A D | exynosautov9.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/samsung,exynosautov9.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/samsung,boot-mode.h> 12 #include <dt-bindings/soc/samsung,exynos-usi.h> 16 #address-cells = <2>; 17 #size-cells = <1>; 19 interrupt-parent = <&gic>; 31 arm-pmu { 32 compatible = "arm,cortex-a76-pmu"; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/tesla/ |
H A D | fsd.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Tesla Full Self-Driving SoC device tree source 5 * Copyright (c) 2017-2022 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2017-2022 Tesla, Inc. 11 #include <dt-bindings/clock/fsd-clk.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 38 #address-cells = <2>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | samsung,pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 - Tomasz Figa <tomasz.figa@gmail.com> 22 - External GPIO interrupts (see interrupts property in pin controller node); 24 - External wake-up interrupts - multiplexed (capable of waking up the system 25 see interrupts property in external wake-up interrupt controller node - 26 samsung,pinctrl-wakeup-interrupt.yaml); [all …]
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