Searched +full:exynos5433 +full:- +full:uart (Results 1 – 10 of 10) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | exynos5433-clock.txt | 1 * Samsung Exynos5433 CMU (Clock Management Units) 3 The Exynos5433 clock controller generates and supplies clock to various 4 controllers within the Exynos5433 SoC. 8 - compatible: should be one of the following. 9 - "samsung,exynos5433-cmu-top" - clock controller compatible for CMU_TOP 12 - "samsung,exynos5433-cmu-cpif" - clock controller compatible for CMU_CPIF 14 - "samsung,exynos5433-cmu-mif" - clock controller compatible for CMU_MIF 16 - "samsung,exynos5433-cmu-peric" - clock controller compatible for CMU_PERIC 17 which generates clocks for UART/I2C/SPI/I2S/PCM/SPDIF/PWM/SLIMBUS IPs. 18 - "samsung,exynos5433-cmu-peris" - clock controller compatible for CMU_PERIS [all …]
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H A D | samsung,exynos5433-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/samsung,exynos5433-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos5433 SoC clock controller 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 - Tomasz Figa <tomasz.figa@gmail.com> 16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching [all …]
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/freebsd/sys/contrib/device-tree/Bindings/serial/ |
H A D | samsung_uart.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung S3C, S5P, Exynos, and S5L (Apple SoC) SoC UART Controller 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org> 14 Each Samsung UART should have an alias correctly numbered in the "aliases" 15 node, according to serialN format, where N is the port number (non-negative 21 - enum: 22 - apple,s5l-uart [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | samsung,exynos5433-lpass.txt | 5 - compatible : "samsung,exynos5433-lpass" 6 - reg : should contain the LPASS top SFR region location 8 - clock-names : should contain following required clocks: "sfr0_ctrl" 9 - clocks : should contain clock specifiers of all clocks, which 10 input names have been specified in clock-names 12 - #address-cells : should be 1 13 - #size-cells : should be 1 14 - ranges : must be present 17 an optional sub-node. For "samsung,exynos5433-lpass" compatible this includes: 18 UART, SLIMBUS, PCM, I2S, DMAC, Timers 0...4, VIC, WDT 0...1 devices. [all …]
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H A D | samsung,exynos5433-lpass.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/samsung,exynos5433 [all...] |
/freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
H A D | exynos5433.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos5433 SoC device tree source 7 * Samsung's Exynos5433 SoC device nodes are listed in this file. 8 * Exynos5433 based board files can include this file and provide 12 * Exynos5433 SoC. As device tree coverage for Exynos5433 increases, 16 #include <dt-bindings/clock/exynos5433.h> 17 #include <dt-bindings/interrupt-controller/arm-gic.h> 20 compatible = "samsung,exynos5433"; 21 #address-cells = <2>; 22 #size-cells = <2>; [all …]
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H A D | exynos7885.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/exynos7885.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #address-cells = <2>; 15 #size-cells = <1>; 17 interrupt-paren [all...] |
H A D | exynos5433-pinctrl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos5433 SoC pin-mux and pin-config device tree source 8 * Samsung's Exynos5433 SoC pin-mux and pin-config options are listed as device 12 #include "exynos-pinctrl.h" 15 pin- ## _pin { \ 17 samsung,pin-function = <EXYNOS_PIN_FUNC_ ##_func>; \ 18 samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \ 19 samsung,pin-drv = <EXYNOS5433_PIN_DRV_ ##_drv>; \ 32 gpa0: gpa0-gpio-bank { 33 gpio-controller; [all …]
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H A D | exynos7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/clock/exynos7-clk.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 interrupt-parent = <&gic>; 15 #address-cell [all...] |
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | samsung-pinctrl.txt | 6 on-chip controllers onto these pads. 9 - compatible: should be one of the following. 10 - "samsung,s3c2412-pinctrl": for S3C2412-compatible pin-controller, 11 - "samsung,s3c2416-pinctrl": for S3C2416-compatible pin-controller, 12 - "samsung,s3c2440-pinctrl": for S3C2440-compatible pin-controller, 13 - "samsung,s3c2450-pinctrl": for S3C2450-compatible pin-controller, 14 - "samsung,s3c64xx-pinctrl": for S3C64xx-compatible pin-controller, 15 - "samsung,s5pv210-pinctrl": for S5PV210-compatible pin-controller, 16 - "samsung,exynos3250-pinctrl": for Exynos3250 compatible pin-controller. 17 - "samsung,exynos4210-pinctrl": for Exynos4210 compatible pin-controller. [all …]
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