Searched +full:exynos5410 +full:- +full:clock (Results 1 – 14 of 14) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | exynos5410-clock.txt | 1 * Samsung Exynos5410 Clock Controller 3 The Exynos5410 clock controller generates and supplies clock to various 4 controllers within the Exynos5410 SoC. 8 - compatible: should be "samsung,exynos5410-clock" 10 - reg: physical base address of the controller and length of memory mapped 13 - #clock-cells: should be 1. 15 - clocks: should contain an entry specifying the root clock from external 16 oscillator supplied through XXTI or XusbXTI pin. This clock should be 17 defined using standard clock bindings with "fin_pll" clock-output-name. 18 That clock is being passed internally to the 9 PLLs. [all …]
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| H A D | samsung,exynos5410-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/samsung,exynos5410-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos5410 SoC clock controller 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 - Tomasz Figa <tomasz.figa@gmail.com> 16 Expected external clocks, defined in DTS as fixed-rate clocks with a matching [all …]
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| H A D | clk-exynos-audss.txt | 1 * Samsung Audio Subsystem Clock Controller 3 The Samsung Audio Subsystem clock controller generates and supplies clocks 4 to Audio Subsystem block available in the S5PV210 and Exynos SoCs. The clock 9 - compatible: should be one of the following: 10 - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs. 11 - "samsung,exynos5250-audss-clock" - controller compatible with Exynos5250 13 - "samsung,exynos5410-audss-clock" - controller compatible with Exynos5410 15 - "samsung,exynos5420-audss-clock" - controller compatible with Exynos5420 17 - reg: physical base address and length of the controller's register set. 19 - #clock-cells: should be 1. [all …]
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| H A D | samsung,exynos-audss-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/samsung,exynos-audss-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC Audio SubSystem clock controller 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 12 - Sylwester Nawrocki <s.nawrocki@samsung.com> 13 - Tomasz Figa <tomasz.figa@gmail.com> 17 include/dt-bindings/clock/exynos-audss-clk.h header. [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/samsung/ |
| H A D | exynos5410.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung Exynos5410 SoC device tree source 8 * Samsung Exynos5410 SoC device nodes are listed in this file. 9 * Exynos5410 based board files can include this file and provide 14 #include <dt-bindings/clock/exynos5410.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 19 compatible = "samsung,exynos5410", "samsung,exynos5"; 20 interrupt-parent = <&gic>; 30 #address-cells = <1>; [all …]
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| H A D | exynos5410-smdk5410.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include "exynos5410.dtsi" 11 #include <dt-bindings/interrupt-controller/irq.h> 13 model = "Samsung SMDK5410 board based on Exynos5410"; 14 compatible = "samsung,smdk5410", "samsung,exynos5410", "samsung,exynos5"; 27 stdout-path = "serial2:115200n8"; 31 compatible = "fixed-clock"; 32 clock-frequency = <24000000>; 33 clock-output-names = "fin_pll"; [all …]
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| H A D | exynos5410-odroidxu.dts | 1 // SPDX-License-Identifier: GPL-2.0 10 /dts-v1/; 11 #include "exynos5410.dtsi" 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/gpio/gpio.h> 14 #include <dt-bindings/interrupt-controller/irq.h> 15 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos54xx-odroidxu-leds.dtsi" 20 compatible = "hardkernel,odroid-xu", "samsung,exynos5410", "samsung,exynos5"; 34 stdout-path = "serial2:115200n8"; [all …]
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| H A D | exynos54xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 9 * Device nodes common for Samsung Exynos5410/5420/5422/5800. Specific 28 arm_a7_pmu: arm-a7-pmu { 29 compatible = "arm,cortex-a7-pmu"; 30 interrupt-parent = <&gic>; 38 arm_a15_pmu: arm-a15-pmu { 39 compatible = "arm,cortex-a15-pmu"; 40 interrupt-parent = <&combiner>; 49 compatible = "arm,armv7-timer"; [all …]
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| H A D | exynos5420.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 14 #include <dt-bindings/clock/exynos5420.h> 15 #include <dt-bindings/clock/exynos-audss-clk.h> 16 #include <dt-bindings/interrupt-controller/arm-gic.h> 37 bus_disp1: bus-disp1 { 38 compatible = "samsung,exynos-bus"; 39 clocks = <&clock CLK_DOUT_ACLK400_DISP1>; 40 clock-names = "bus"; 44 bus_disp1_fimd: bus-disp1-fimd { 45 compatible = "samsung,exynos-bus"; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/arm/samsung/ |
| H A D | pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 18 - samsung,exynos3250-pmu 19 - samsung,exynos4210-pmu 20 - samsung,exynos4412-pmu 21 - samsung,exynos5250-pmu 22 - samsung,exynos5260-pmu 23 - samsung,exynos5410-pmu [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/soc/samsung/ |
| H A D | exynos-pmu.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/soc/samsung/exynos-pmu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 18 - googl [all...] |
| /freebsd/sys/contrib/device-tree/Bindings/display/exynos/ |
| H A D | exynos_dsim.txt | 4 - compatible: value should be one of the following 5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */ 6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */ 7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */ 8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */ 9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */ 10 - reg: physical base address and length of the registers set for the device 11 - interrupts: should contain DSI interrupt 12 - clocks: list of clock specifiers, must contain an entry for each required 13 entry in clock-names [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/display/bridge/ |
| H A D | samsung,mipi-dsim.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/samsung,mipi-dsim.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Inki Dae <inki.dae@samsung.com> 11 - Jagan Teki <jagan@amarulasolutions.com> 12 - Marek Szyprowski <m.szyprowski@samsung.com> 21 - enum: 22 - samsung,exynos3250-mipi-dsi 23 - samsung,exynos4210-mipi-dsi [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
| H A D | samsung,pinctrl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Krzysztof Kozlowski <krzk@kernel.org> 11 - Sylwester Nawrocki <s.nawrocki@samsung.com> 12 - Tomasz Figa <tomasz.figa@gmail.com> 22 - External GPIO interrupts (see interrupts property in pin controller node); 24 - External wake-up interrupts - multiplexed (capable of waking up the system 25 see interrupts property in external wake-up interrupt controller node - 26 samsung,pinctrl-wakeup-interrupt.yaml); [all …]
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