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/linux/Documentation/devicetree/bindings/display/samsung/
H A Dsamsung,exynos5-dp.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/samsung/samsung,exynos5-dp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Inki Dae <inki.dae@samsung.com>
11 - Seung-Woo Kim <sw0312.kim@samsung.com>
12 - Kyungmin Park <kyungmin.park@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
17 const: samsung,exynos5-dp
25 clock-names:
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos5.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos5 SoC series common device tree source
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
8 * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
9 * SoCs from Exynos5 series can include this file and provide values for SoCs
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
17 interrupt-parent = <&gic>;
18 #address-cells = <1>;
19 #size-cells = <1>;
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H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
18 #include "exynos5.dtsi"
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
23 compatible = "samsung,exynos5250", "samsung,exynos5";
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
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H A Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 compatible = "samsung,exynos5420", "samsung,exynos5";
37 bus_disp1: bus-disp1 {
38 compatible = "samsung,exynos-bus";
40 clock-names = "bus";
44 bus_disp1_fimd: bus-disp1-fimd {
45 compatible = "samsung,exynos-bus";
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H A Dexynos5420-smdk5420.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include "exynos5420-cpus.dtsi"
12 #include <dt-bindings/clock/samsung,s2mps11.h>
13 #include <dt-bindings/gpio/gpio.h>
17 compatible = "samsung,smdk5420", "samsung,exynos5420", "samsung,exynos5";
31 stdout-path = "serial2:115200n8";
34 fixed-rate-clocks {
36 compatible = "samsung,exynos5420-oscclk";
37 clock-frequency = <24000000>;
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H A Dexynos5250-smdk5250.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/maxim,max77686.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
17 compatible = "samsung,smdk5250", "samsung,exynos5250", "samsung,exynos5";
31 stdout-path = "serial2:115200n8";
34 vdd: fixed-regulator-vdd {
35 compatible = "regulator-fixed";
36 regulator-name = "vdd-supply";
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H A Dexynos5250-spring.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/clock/samsung,s2mps11.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/input/input.h>
18 compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
19 chassis-type = "laptop";
33 stdout-path = "serial3:115200n8";
36 gpio-keys {
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H A Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pit-rev16",
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H A Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
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/linux/drivers/gpu/drm/exynos/
H A Dexynos_dp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Samsung SoC DP (Display Port) interface driver.
51 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_crtc_clock_enable() local
52 struct drm_encoder *encoder = &dp->encoder; in exynos_dp_crtc_clock_enable()
54 if (!encoder->crtc) in exynos_dp_crtc_clock_enable()
55 return -EPERM; in exynos_dp_crtc_clock_enable()
57 exynos_drm_pipe_clk_enable(to_exynos_crtc(encoder->crtc), enable); in exynos_dp_crtc_clock_enable()
75 struct exynos_dp_device *dp = to_dp(plat_data); in exynos_dp_get_modes() local
78 if (dp->plat_data.panel) in exynos_dp_get_modes()
81 mode = drm_mode_create(connector->dev); in exynos_dp_get_modes()
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/linux/Documentation/admin-guide/media/
H A Dcec.rst1 .. SPDX-License-Identifier: GPL-2.0
12 - Exynos4
13 - Exynos5
14 - STIH4xx HDMI CEC
15 - V4L2 adv7511 (same HW, but a different driver from the drm adv7511)
16 - stm32
17 - Allwinner A10 (sun4i)
18 - Raspberry Pi
19 - dw-hdmi (Synopsis IP)
20 - amlogic (meson ao-cec and ao-cec-g12a)
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/linux/drivers/clk/samsung/
H A Dclk-exynos5250.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <dt-bindings/clock/exynos5250.h>
11 #include <linux/clk-provider.h>
17 #include "clk-cpu.h"
18 #include "clk-exynos5-subcmu.h"
662 GATE(CLK_DP, "dp", "mout_aclk200_disp1_sub", GATE_IP_DISP1, 4, 0, 0),
785 { .compatible = "samsung,clock-xxti", .data = (void *)0, },
805 hws = ctx->clk_data.hws; in exynos5250_clk_init()
866 CLK_OF_DECLARE_DRIVER(exynos5250_clk, "samsung,exynos5250-clock", exynos5250_clk_init);