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Searched +full:exynos4210 +full:- +full:sysram +full:- +full:ns (Results 1 – 7 of 7) sorted by relevance

/linux/arch/arm/mach-exynos/
H A Dexynos.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd.
15 #include <linux/soc/samsung/exynos-regs-pmu.h>
18 #include <asm/hardware/cache-l2x0.h>
33 .id = -1,
52 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram") { in exynos_sysram_init()
64 for_each_compatible_node(node, NULL, "samsung,exynos4210-sysram-ns") { in exynos_sysram_init()
80 if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid")) in exynos_fdt_map_chipid()
88 iodesc.length = be32_to_cpu(reg[1]) - 1; in exynos_fdt_map_chipid()
137 * Apparently, these SoCs are not able to wake-up from suspend using
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H A Dmcpm-exynos.c1 // SPDX-License-Identifier: GPL-2.0
5 // Based on arch/arm/mach-vexpress/dcscb.c
7 #include <linux/arm-cci.h>
12 #include <linux/soc/samsung/exynos-regs-pmu.h>
65 return -EINVAL; in exynos_cpu_powerup()
87 timeout--; in exynos_cpu_powerup()
95 return -ETIMEDOUT; in exynos_cpu_powerup()
110 return -EINVAL; in exynos_cluster_powerup()
143 * On the Cortex-A15 we need to disable in exynos_cluster_cache_disable()
157 * Disable cluster-level coherency by masking in exynos_cluster_cache_disable()
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/linux/arch/arm/boot/dts/samsung/
H A Dexynos54xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
28 arm_a7_pmu: arm-a7-pmu {
29 compatible = "arm,cortex-a7-pmu";
30 interrupt-parent = <&gic>;
38 arm_a15_pmu: arm-a15-pmu {
39 compatible = "arm,cortex-a15-pmu";
40 interrupt-parent = <&combiner>;
49 compatible = "arm,armv7-timer";
54 clock-frequency = <24000000>;
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H A Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 SoC device tree source
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
10 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
15 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
20 #include "exynos4-cpu-thermal.dtsi"
23 compatible = "samsung,exynos4210", "samsung,exynos4";
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
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H A Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
46 #address-cells = <1>;
47 #size-cells = <0>;
49 cpu-map {
62 compatible = "arm,cortex-a15";
65 clock-names = "cpu";
66 operating-points-v2 = <&cpu0_opp_table>;
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H A Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
46 bus_dmc: bus-dmc {
47 compatible = "samsung,exynos-bus";
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H A Dexynos4x12.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
27 fimc-lite0 = &fimc_lite_0;
28 fimc-lite1 = &fimc_lite_1;
31 bus_acp: bus-acp {
32 compatible = "samsung,exynos-bus";
34 clock-names = "bus";
35 operating-points-v2 = <&bus_acp_opp_table>;
38 bus_acp_opp_table: opp-table {
39 compatible = "operating-points-v2";
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