Searched +full:exynos4210 +full:- +full:ohci (Results 1 – 7 of 7) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | samsung,exynos-usb2.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/usb/samsung,exynos-usb2.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC USB 2.0 EHCI/OHCI Controller 10 - Krzysztof Kozlowski <krzk@kernel.org> 15 - samsung,exynos4210-ehci 16 - samsung,exynos4210-ohci 21 clock-names: 23 - const: usbhost [all …]
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H A D | exynos-usb.txt | 8 - compatible: should be "samsung,exynos4210-ehci" for USB 2.0 10 - reg: physical base address of the controller and length of memory mapped 12 - interrupts: interrupt number to the cpu. 13 - clocks: from common clock binding: handle to usb clock. 14 - clock-names: from common clock binding: Shall be "usbhost". 15 - phys: from the *Generic PHY* bindings; array specifying phy(s) used 17 - phy-names: from the *Generic PHY* bindings; array of the names for 22 - samsung,vbus-gpio: if present, specifies the GPIO that 28 compatible = "samsung,exynos4210-ehci"; 31 samsung,vbus-gpio = <&gpx2 6 1 3 3>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | exynos54xx.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 28 arm_a7_pmu: arm-a7-pmu { 29 compatible = "arm,cortex-a7-pmu"; 30 interrupt-parent = <&gic>; 38 arm_a15_pmu: arm-a15-pmu { 39 compatible = "arm,cortex-a15-pmu"; 40 interrupt-parent = <&combiner>; 49 compatible = "arm,armv7-timer"; 54 clock-frequency = <24000000>; [all …]
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H A D | exynos4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 19 #include <dt-bindings/clock/exynos4.h> 20 #include <dt-bindings/clock/exynos-audss-clk.h> 21 #include <dt-bindings/interrupt-controller/arm-gic.h> 22 #include <dt-bindings/interrupt-controller/irq.h> 25 interrupt-parent = <&gic>; 26 #address-cells = <1>; 27 #size-cells = <1>; [all …]
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H A D | exynos5250.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 17 #include <dt-bindings/clock/exynos5250.h> 19 #include "exynos4-cpu-thermal.dtsi" 20 #include <dt-bindings/clock/exynos-audss-clk.h> 46 #address-cells = <1>; 47 #size-cells = <0>; 49 cpu-map { 62 compatible = "arm,cortex-a15"; 65 clock-names = "cpu"; 66 operating-points-v2 = <&cpu0_opp_table>; [all …]
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H A D | exynos4210-universal_c210.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung's Exynos4210 based Universal C210 board device tree source 5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 9 * Samsung's Exynos4210 rev0 SoC. 12 /dts-v1/; 13 #include "exynos4210.dtsi" 14 #include <dt-bindings/gpio/gpio.h> 17 model = "Samsung Universal C210 based on Exynos4210 rev [all...] |
H A D | s5pv210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 19 #include <dt-bindings/clock/s5pv210.h> 20 #include <dt-bindings/clock/s5pv210-audss.h> 23 #address-cells = <1>; 24 #size-cells = <1>; 45 #address-cells = <1>; 46 #size-cells = <0>; 50 compatible = "arm,cortex-a8"; 55 xxti: oscillator-0 { [all …]
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