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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dmediatek,mtk-cirq.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/mediatek,mtk-cirq.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Youlin Pei <youlin.pei@mediatek.com>
14 work outside of MCUSYS which comprises with Cortex-Ax cores, CCI and GIC.
16 to GIC in MCUSYS. When CIRQ is enabled, it will record the edge-sensitive
25 - enum:
26 - mediatek,mt2701-cirq
27 - mediatek,mt8135-cirq
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/linux/drivers/comedi/drivers/
H A Drtd520.c1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
13 * Devices: [Real Time Devices] DM7520HR-1 (DM7520), DM7520HR-8,
14 * PCI4520 (PCI4520), PCI4520-8
16 * Status: Works. Only tested on DM7520-8. Not SMP safe.
24 * The PCI4520 is a PCI card. The DM7520 is a PC/104-plus card.
40 * These boards can support external multiplexors and multi-board
71 * Analog-In supports instruction and command mode.
73 * With DMA, you can sample at 1.15Mhz with 70% idle on a 400Mhz K6-2
75 * using DMA with ALI-15xx based systems. I haven't been able to test
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H A Dcb_pcidas.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Copyright (C) 2001-2003 Ivan Martinez <imr@oersted.dtu.dk>
10 * COMEDI - Linux Control and Measurement Device Interface
11 * Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
16 * Description: MeasurementComputing PCI-DAS series
18 * Devices: [Measurement Computing] PCI-DAS1602/16 (cb_pcidas),
19 * PCI-DAS1602/16jr, PCI-DAS1602/12, PCI-DAS1200, PCI-DAS1200jr,
20 * PCI-DAS1000, PCI-DAS1001, PCI_DAS1002
23 * Updated: 2003-3-11
36 * (i.e. 4-5-6-7, 2-3-4,...), and must all have the same
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H A Dadv_pci1710.c1 // SPDX-License-Identifier: GPL-2.0
4 * Comedi driver for Advantech PCI-1710 series boards
13 * Description: Comedi driver for Advantech PCI-1710 series boards
14 * Devices: [Advantech] PCI-1710 (adv_pci1710), PCI-1710HG, PCI-1711,
15 * PCI-1713, PCI-1731
17 * Updated: Fri, 29 Oct 2015 17:19:35 -0700
26 * The PCI-1710 and PCI-1710HG have the same PCI device ID, so the
39 * PCI BAR2 Register map (dev->iobase)
43 #define PCI171X_RANGE_REG 0x02 /* W: A/D gain/range register */
52 #define PCI171X_STATUS_IRQ BIT(11) /* 1=IRQ occurred */
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H A Damplc_pci224.c1 // SPDX-License-Identifier: GPL-2.0+
8 * COMEDI - Linux Control and Measurement Device Interface
22 * - ao_insn read/write
23 * - ao_do_cmd mode with the following sources:
25 * - start_src TRIG_INT TRIG_EXT
26 * - scan_begin_src TRIG_TIMER TRIG_EXT
27 * - convert_src TRIG_NOW
28 * - scan_end_src TRIG_COUNT
29 * - stop_src TRIG_COUNT TRIG_EXT TRIG_NONE
44 * Output range selection - PCI224:
[all …]
H A Dadl_pci9118.c1 // SPDX-License-Identifier: GPL-2.0
6 * card: PCI-9118DG, PCI-9118HG, PCI-9118HR
15 * Description: Adlink PCI-9118DG, PCI-9118HG, PCI-9118HR
17 * Devices: [ADLink] PCI-9118DG (pci9118dg), PCI-9118HG (pci9118hg),
18 * PCI-9118HR (pci9118hr)
25 * - If cmd->scan_begin_src=TRIG_EXT then trigger input is TGIN (pin 46).
26 * - If cmd->convert_src=TRIG_EXT then trigger input is EXTTRG (pin 44).
27 * - If cmd->start_src/stop_src=TRIG_EXT then trigger input is TGIN (pin 46).
28 * - It is not necessary to have cmd.scan_end_arg=cmd.chanlist_len but
30 * - If return value of cmdtest is 5 then you've bad channel list
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H A Damplc_pci230.c1 // SPDX-License-Identifier: GPL-2.0+
8 * COMEDI - Linux Control and Measurement Device Interface
35 * --------- ---------
43 * The AI subdevice has 16 single-ended channels or 8 differential
46 * The PCI230 and PCI260 cards have 12-bit resolution. The PCI230+ and
47 * PCI260+ cards have 16-bit resolution.
51 * or PCI260 then it actually uses a "pseudo-differential" mode where the
62 * 0 => [-10, +10] V
63 * 1 => [-5, +5] V
64 * 2 => [-2.5, +2.5] V
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H A Dpcl818.c1 // SPDX-License-Identifier: GPL-2.0
6 * Description: Advantech PCL-818 cards, PCL-718
8 * Devices: [Advantech] PCL-818L (pcl818l), PCL-818H (pcl818h),
9 * PCL-818HD (pcl818hd), PCL-818HG (pcl818hg), PCL-818 (pcl818),
10 * PCL-718 (pcl718)
14 * Differences are only at maximal sample speed, range list and FIFO
18 * PCL-818HD and PCL-818HG support 1kword FIFO. Driver support this FIFO
37 * Options for PCL-818L:
38 * [0] - IO Base
39 * [1] - IRQ (0=disable, 2, 3, 4, 5, 6, 7)
[all …]
H A Damplc_dio200_pci.c1 // SPDX-License-Identifier: GPL-2.0+
6 * Copyright (C) 2005-2013 MEV Ltd. <https://www.mev.co.uk/>
8 * COMEDI - Linux Control and Measurement Device Interface
30 * ------------- ------------- -------------
32 * 0 PPI-X PPI-X PPI-X
33 * 1 PPI-Y UNUSED UNUSED
34 * 2 CTR-Z1 PPI-Y UNUSED
35 * 3 CTR-Z2 UNUSED UNUSED
36 * 4 INTERRUPT CTR-Z1 CTR-Z1
37 * 5 CTR-Z2 CTR-Z2
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/linux/drivers/irqchip/
H A Dirq-mtk-cirq.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/irq.h>
71 return chip_data->base + chip_data->offsets[idx]; in mtk_cirq_reg()
83 struct mtk_cirq_chip_data *chip_data = data->chip_data; in mtk_cirq_write_mask()
84 unsigned int cirq_num = data->hwirq; in mtk_cirq_write_mask()
127 data = data->parent_data; in mtk_cirq_set_type()
128 ret = data->chip->irq_set_type(data, type); in mtk_cirq_set_type()
149 if (is_of_node(fwspec->fwnode)) { in mtk_cirq_domain_translate()
150 if (fwspec->param_count != 3) in mtk_cirq_domain_translate()
151 return -EINVAL; in mtk_cirq_domain_translate()
[all …]
/linux/drivers/power/supply/
H A Dab8500_btemp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) ST-Ericsson SA 2012
31 #include <linux/fixp-arith.h>
33 #include "ab8500-bm.h"
35 #define BTEMP_THERMAL_LOW_LIMIT -10
51 * struct ab8500_btemp_interrupts - ab8500 interrupts
57 irqreturn_t (*isr)(int irq, void *data);
77 * struct ab8500_btemp - ab8500 BTEMP device information
90 * @btemp_ranges: Battery temperature range structure
124 * ab8500_btemp_batctrl_volt_to_res() - convert batctrl voltage to resistance
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/linux/Documentation/devicetree/bindings/net/
H A Dti,k3-am654-cpts.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpts.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Siddharth Vadapalli <s-vadapalli@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
17 - selection of multiple external clock sources
18 - Software control of time sync events via interrupt or polling
19 - 64-bit timestamp mode in ns with PPM and nudge adjustment.
20 - hardware timestamp push inputs (HWx_TS_PUSH)
[all …]
H A Dti,k3-am654-cpsw-nuss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Siddharth Vadapalli <s-vadapalli@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
22 Complex (UDMA-P) controller.
52 "#address-cells": true
53 "#size-cells": true
57 - ti,am642-cpsw-nuss
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/linux/arch/powerpc/platforms/cell/
H A Dinterrupt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 * - Fix various assumptions related to HW CPU numbers vs. linux CPU numbers
15 * - Implement proper handling of maxcpus=1/2 (that is, routing of irqs from
16 * a non-active node to the active node)
20 #include <linux/irq.h>
33 #include <asm/cell-regs.h>
49 /* Convert between "pending" bits and hw irq number */
74 out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]); in iic_eoi()
75 BUG_ON(iic->eoi_ptr < 0); in iic_eoi()
79 .name = "CELL-IIC",
[all …]
/linux/drivers/scsi/bfa/
H A Dbfad.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
4 * Copyright (c) 2014- QLogic Corporation.
8 * Linux driver for QLogic BR-series Fibre Channel Host Bus Adapter.
47 int bfa_linkup_delay = -1;
59 #define BFAD_FW_FILE_CB "cbfw-3.2.5.1.bin"
60 #define BFAD_FW_FILE_CT "ctfw-3.2.5.1.bin"
61 #define BFAD_FW_FILE_CT2 "ct2fw-3.2.5.1.bin"
110 "Range[>0]");
112 MODULE_PARM_DESC(bfa_lun_queue_depth, "Lun queue depth, default=32, Range[>0]");
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/linux/include/linux/iio/common/
H A Dst_sensors.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright 2012-2013 STMicroelectronics Inc.
54 ch2, s, endian, rbits, sbits, addr, ext) \ argument
66 .shift = sbits - rbits, \
70 .ext_info = ext, \
128 * struct st_sensor_bdu - ST sensor device block data update
138 * struct st_sensor_das - ST sensor device data alignment selection
148 * struct st_sensor_int_drdy - ST sensor device drdy line parameters
162 * struct st_sensor_data_ready_irq - ST sensor device data-ready interrupt
163 * struct int1 - data-ready configuration register for INT1 pin.
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/linux/drivers/i2c/busses/
H A Di2c-octeon-core.c2 * (C) Copyright 2009-2010
3 * Nokia Siemens Networks, michael.lawnick.ext@nsn.com
5 * Portions Copyright (C) 2010 - 2016 Cavium, Inc.
22 #include "i2c-octeon-core.h"
29 irqreturn_t octeon_i2c_isr(int irq, void *dev_id) in octeon_i2c_isr() argument
33 i2c->int_disable(i2c); in octeon_i2c_isr()
34 wake_up(&i2c->queue); in octeon_i2c_isr()
45 * octeon_i2c_wait - wait for the IFLG to be set
55 * Some chip revisions don't assert the irq in the interrupt in octeon_i2c_wait()
58 if (i2c->broken_irq_mode) { in octeon_i2c_wait()
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/linux/arch/powerpc/boot/dts/
H A Da4m072.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 &gpt0 { fsl,has-wdt; };
15 &gpt3 { gpio-controller; };
16 &gpt4 { gpio-controller; };
17 &gpt5 { gpio-controller; };
24 #address-cells = <1>;
25 #size-cells = <1>;
26 compatible = "fsl,mpc5200b-immr";
29 bus-frequency = <0>; /* From boot loader */
30 system-frequency = <0>; /* From boot loader */
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/linux/drivers/net/ethernet/microchip/lan966x/
H A Dlan966x_main.c1 // SPDX-License-Identifier: GPL-2.0+
25 #define XTR_VALID_BYTES(x) (4 - (((x) >> 24) & 3))
30 { .compatible = "microchip,lan966x-switch" },
38 int range; member
74 /* Initially map the entire range and after that update each target to in lan966x_create_targets()
83 dev_err(&pdev->dev, "Invalid resource\n"); in lan966x_create_targets()
84 return -EINVAL; in lan966x_create_targets()
87 begin[idx] = devm_ioremap(&pdev->dev, in lan966x_create_targets()
88 iores[idx]->start, in lan966x_create_targets()
91 dev_err(&pdev->dev, "Unable to get registers: %s\n", in lan966x_create_targets()
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/linux/drivers/net/ethernet/marvell/
H A Dskge.h1 /* SPDX-License-Identifier: GPL-2.0 */
133 CS_CLK_RUN_HOT = 1<<13,/* CLK_RUN hot m. (YUKON-Lite only) */
134 CS_CLK_RUN_RST = 1<<12,/* CLK_RUN reset (YUKON-Lite only) */
135 CS_CLK_RUN_ENA = 1<<11,/* CLK_RUN enable (YUKON-Lite only) */
139 CS_ST_SW_IRQ = 1<<7, /* Set IRQ SW Request */
140 CS_CL_SW_IRQ = 1<<6, /* Clear IRQ SW Request */
164 /* B2_IRQM_MSK 32 bit IRQ Moderation Mask */
173 IS_I2C_READY = 1<<25, /* IRQ on end of I2C Tx */
174 IS_IRQ_SW = 1<<24, /* SW forced IRQ */
175 IS_EXT_REG = 1<<23, /* IRQ from LM80 or PHY (GENESIS only) */
[all …]
/linux/drivers/gpu/drm/imagination/
H A Dpvr_rogue_fwif_sf.h1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
47 * - --- ---- ---- ---- ---- ---- ---- ----
48 * 0-11: id number
49 * 12-15: group id number
50 * 16-19: number of parameters
51 * 20-27: unused
52 * 28-30: active: identify SF packet, otherwise regular int32
114 "UFO PR-Check: [0x%08.8x] is 0x%08.8x requires >= 0x%08.8x" },
116 "UFO SPM PR-Checks for FWCtx 0x%08.8x" },
118 …"UFO SPM special PR-Check: [0x%08.8x] is 0x%08.8x requires >= ????????, [0x%08.8x] is ???????? req…
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/linux/arch/arm/boot/dts/broadcom/
H A Dbcm-hr2.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
39 interrupt-parent = <&gic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
49 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
56 compatible = "arm,cortex-a9-pmu";
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/linux/drivers/counter/
H A D104-quad-8.c1 // SPDX-License-Identifier: GPL-2.0
3 * Counter driver for the ACCES 104-QUAD-8
6 * This driver supports the ACCES 104-QUAD-8 and ACCES 104-QUAD-4.
32 MODULE_PARM_DESC(base, "ACCES 104-QUAD-8 base addresses");
34 static unsigned int irq[max_num_isa_dev(QUAD8_EXTENT)]; variable
36 module_param_hw_array(irq, uint, irq, &num_irq, 0);
37 MODULE_PARM_DESC(irq, "ACCES 104-QUAD-8 interrupt line numbers");
50 * struct quad8 - device private data structure
140 /* Range Limit */
142 /* Non-recycle count */
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/linux/drivers/iommu/amd/
H A Dinit.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2007-2010 Advanced Micro Devices, Inc.
8 #define pr_fmt(fmt) "AMD-Vi: " fmt
19 #include <linux/irq.h>
20 #include <linux/amd-iommu.h>
25 #include <asm/pci-direct.h>
39 #include "../iommu-pages.h"
127 u32 ext;
186 /* IOMMUs have a non-present cache? */
240 return (iommu->flags & AMD_IOMMU_FLAG_TRANS_PRE_ENABLED); in translation_pre_enabled()
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/linux/include/linux/
H A Dregmap.h1 /* SPDX-License-Identifier: GPL-2.0-only */
54 #define REGMAP_UPSHIFT(s) (-(s))
66 * struct reg_default - Default value for a register.
80 * struct reg_sequence - An individual write from a sequence of writes.
103 * regmap_read_poll_timeout - Poll until a condition is met or a timeout occurs
110 * tight-loops). Should be less than ~20ms since usleep_range
111 * is used (see Documentation/timers/timers-howto.rst).
114 * Returns 0 on success and -ETIMEDOUT upon a timeout or the regmap_read
130 * regmap_read_poll_timeout_atomic - Poll until a condition is met or a timeout occurs
136 * @delay_us: Time to udelay between reads in us (0 tight-loops).
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