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/linux/Documentation/devicetree/bindings/net/
H A Dethernet-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic Ethernet Switch
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Vladimir Oltean <olteanv@gmail.com>
15 Ethernet switches are multi-port Ethernet controllers. Each port has
16 its own number and is represented as its own Ethernet controller.
[all …]
H A Dmscc,vsc7514-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/mscc,vsc7514-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip VSC7514 Ethernet switch controller
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
17 The VSC7514 switch driver handles up to 11 ports and can inject/extract
22 - if:
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H A Dsunplus,sp7021-emac.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/sunplus,sp7021-emac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Sunplus SP7021 Dual Ethernet MAC
11 - Wells Lu <wellslutw@gmail.com>
14 Sunplus SP7021 dual 10M/100M Ethernet MAC controller.
19 const: sunplus,sp7021-emac
33 ethernet-ports:
36 description: Ethernet ports to PHY
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H A Dti,k3-am654-cpsw-nuss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,k3-am654-cpsw-nuss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: The TI AM654x/J721E/AM642x SoC Gigabit Ethernet MAC (Media Access Controller)
10 - Siddharth Vadapalli <s-vadapalli@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
14 The TI AM654x/J721E SoC Gigabit Ethernet MAC (CPSW2G NUSS) has two ports
15 (one external) and provides Ethernet packet communication for the device.
16 The TI AM642x SoC Gigabit Ethernet MAC (CPSW3G NUSS) has three ports
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H A Dti,cpsw-switch.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI SoC Ethernet Switch Controller (CPSW)
10 - Siddharth Vadapalli <s-vadapalli@ti.com>
11 - Roger Quadros <rogerq@kernel.org>
14 The 3-port switch gigabit ethernet subsystem provides ethernet packet
15 communication and can be configured as an ethernet switch. It provides the
24 - const: ti,cpsw-switch
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H A Dmicrochip,lan966x-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Lan966x Ethernet switch controller
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces.
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/linux/Documentation/devicetree/bindings/net/dsa/
H A Dmscc,ocelot.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - UNGLinuxDriver@microchip.com
16 There are multiple switches which are either part of the Ocelot-1 family, or
20 them performs packet I/O primarily through an Ethernet port of the switch
21 (which is attached to an Ethernet port of the host), rather than through
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H A Ddsa.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ethernet Switch
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Vladimir Oltean <olteanv@gmail.com>
15 This binding represents Ethernet Switches which have a dedicated CPU
16 port. That port is usually connected to an Ethernet Controller of the
21 $ref: /schemas/net/ethernet-switch.yaml#
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H A Dmediatek,mt7530.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek MT7530 and MT7531 Ethernet Switches
10 - Arınç ÜNAL <arinc.unal@arinc9.com>
11 - Landen Chao <Landen.Chao@mediatek.com>
12 - DENG Qingfang <dqfext@gmail.com>
13 - Sean Wang <sean.wang@mediatek.com>
14 - Daniel Golle <daniel@makrotopia.org>
17 There are three versions of MT7530, standalone, in a multi-chip module and
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H A Drenesas,rzn1-a5psw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/N1 Advanced 5 ports ethernet switch
10 - Clément Léger <clement.leger@bootlin.com>
13 The advanced 5 ports switch is present on the Renesas RZ/N1 SoC family and
14 handles 4 ports + 1 CPU management port.
17 - $ref: dsa.yaml#/$defs/ethernet-ports
22 - enum:
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H A Dvitesse,vsc73xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 The Vitesse DSA Switches were produced in the early-to-mid 2000s.
19 Vitesse VSC7385 SparX-G5 5+1-port Integrated Gigabit Ethernet Switch
20 Vitesse VSC7388 SparX-G8 8-port Integrated Gigabit Ethernet Switch
21 Vitesse VSC7395 SparX-G5e 5+1-port Integrated Gigabit Ethernet Switch
22 Vitesse VSC7398 SparX-G8e 8-port Integrated Gigabit Ethernet Switch
27 reside inside a SPI bus device tree node, see spi/spi-bus.txt
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H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
20 mdio-bus configurations are not supported by the hardware.
27 - enum:
28 - qca,qca8327
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H A Darrow,xrs700x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - George McCollister <george.mccollister@gmail.com>
16 The Arrow SpeedChips XRS7000 Series of single chip gigabit Ethernet switches
18 RGMII ports and one RMII port and are managed via i2c or mdio.
23 - enum:
24 - arrow,xrs7003e
25 - arrow,xrs7003f
[all …]
H A Dmicrochip,lan937x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: LAN937x Ethernet Switch Series
10 - UNGLinuxDriver@microchip.com
13 - $ref: dsa.yaml#/$defs/ethernet-ports
18 - microchip,lan9370
19 - microchip,lan9371
20 - microchip,lan9372
21 - microchip,lan9373
[all …]
H A Dqca,ar9331.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Atheros AR9331 built-in switch
10 - Oleksij Rempel <o.rempel@pengutronix.de>
13 Qualcomm Atheros AR9331 is a switch built-in to Atheros AR9331 WiSoC and
14 addressable over internal MDIO bus. All PHYs are built-in as well.
18 const: qca,ar9331-switch
26 interrupt-controller: true
28 '#interrupt-cells':
[all …]
H A Dmicrochip,ksz.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip KSZ Series Ethernet switches
10 - Marek Vasut <marex@denx.de>
11 - Woojung Huh <Woojung.Huh@microchip.com>
14 - $ref: /schemas/spi/spi-peripheral-props.yaml#
21 - microchip,ksz8765
22 - microchip,ksz8794
23 - microchip,ksz8795
[all …]
/linux/drivers/net/dsa/sja1105/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "NXP SJA1105 Ethernet switch family support"
11 This is the driver for the NXP SJA1105 (5-port) and SJA1110 (10-port)
12 automotive Ethernet switch family. These are managed over an SPI
15 - SJA1105E (Gen. 1, No TT-Ethernet)
16 - SJA1105T (Gen. 1, TT-Ethernet)
17 - SJA1105P (Gen. 2, No SGMII, No TT-Ethernet)
18 - SJA1105Q (Gen. 2, No SGMII, TT-Ethernet)
19 - SJA1105R (Gen. 2, SGMII, No TT-Ethernet)
20 - SJA1105S (Gen. 2, SGMII, TT-Ethernet)
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-j784s4-evm-quad-port-eth-exp1.dtso1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
3 * DT Overlay for CPSW9G in QSGMII mode using J7 Quad Port ETH EXP Add-On Ethernet Card with
4 * J784S4 EVM. The Add-On Ethernet Card has to be connected to ENET Expansion 1 slot on the
11 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
14 /dts-v1/;
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/phy/phy-cadence.h>
19 #include <dt-bindings/phy/phy.h>
21 #include "k3-pinctrl.h"
22 #include "k3-serdes.h"
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H A Dk3-j7200-evm-quad-port-eth-exp.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * DT Overlay for CPSW5G in QSGMII mode using J7 Quad Port ETH EXP Add-On Ethernet Card with
6 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
14 #include "k3-pinctrl.h"
15 #include "k3-serdes.h"
19 ethernet1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1";
20 ethernet2 = "/bus@100000/ethernet@c000000/ethernet-ports/port@2";
21 ethernet3 = "/bus@100000/ethernet@c000000/ethernet-ports/port@3";
[all …]
H A Dk3-j721e-evm-quad-port-eth-exp.dtso1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * DT Overlay for CPSW9G in QSGMII mode using J7 Quad Port ETH EXP Add-On Ethernet Card with
6 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/phy/phy-cadence.h>
16 #include "k3-pinctrl.h"
17 #include "k3-serdes.h"
21 ethernet1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1";
[all …]
H A Dk3-j784s4-evm-usxgmii-exp1-exp2.dtso1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
3 * DT Overlay for CPSW9G in dual port fixed-link USXGMII mode using ENET-1
4 * and ENET-2 Expansion slots of J784S4 EVM.
6 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/
9 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/phy/phy-cadence.h>
14 #include <dt-bindings/phy/phy.h>
16 #include "k3-serdes.h"
20 ethernet1 = "/bus@100000/ethernet@c000000/ethernet-ports/port@1";
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/linux/Documentation/networking/dsa/
H A Dconfiguration.rst1 .. SPDX-License-Identifier: GPL-2.0
10 .. _dsa-config-showcases:
13 -----------------------
19 Every switch port acts as a different configurable Ethernet port
22 Every switch port is part of one configurable Ethernet bridge
26 Ethernet bridge.
27 The upstream port acts as different configurable Ethernet port.
32 Through DSA every port of a switch is handled like a normal linux Ethernet
33 interface. The CPU port is the switch port connected to an Ethernet MAC chip.
34 The corresponding linux Ethernet interface is called the conduit interface.
[all …]
H A Ddsa.rst14 support Marvell Ethernet switches (MV88E6xxx, a.k.a. Link Street product
22 An Ethernet switch typically comprises multiple front-panel ports and one
23 or more CPU or management ports. The DSA subsystem currently relies on the
24 presence of a management port connected to an Ethernet controller capable of
25 receiving Ethernet frames from the switch. This is a very common setup for all
26 kinds of Ethernet switches found in Small Home and Office products: routers,
27 gateways, or even top-of-rack switches. This host Ethernet controller will
32 using upstream and downstream Ethernet links between switches. These specific
33 ports are referred to as "dsa" ports in DSA terminology and code. A collection
36 For each front-panel port, DSA creates specialized network devices which are
[all …]
H A Dlan9303.rst2 LAN9303 Ethernet switch driver
5 The LAN9303 is a three port 10/100 Mbps ethernet switch with integrated phys for
6 the two external ethernet ports. The third port is an RMII/MII interface to a
24 When both user ports are joined to the same bridge, the normal HW MAC learning
29 If one of the user ports leave the bridge, the ports goes back to the initial
36 - Support for VLAN filtering is not implemented
37 - The HW does not support VLAN-specific fdb entries
/linux/Documentation/networking/
H A Dbridge.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Ethernet Bridging
10 The IEEE 802.1Q-2022 (Bridges and Bridged Networks) standard defines the
23 .. kernel-doc:: net/bridge/br_private.h
33 -------------------------
35 .. kernel-doc:: include/uapi/linux/if_link.h
39 ------------------------------
41 .. kernel-doc:: include/uapi/linux/if_link.h
45 ------------
55 Ethernet networks by identifying and disabling redundant links. In a Linux
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