Searched +full:eth +full:- +full:ck (Results  1 – 5 of 5) sorted by relevance
| /linux/tools/testing/selftests/net/ | 
| H A D | msg_zerocopy.c | 7  * - SOCK_STREAM8  * - SOCK_DGRAM
 9  * - SOCK_DGRAM with UDP_CORK
 10  * - SOCK_RAW
 11  * - SOCK_RAW with IP_HDRINCL
 14  * - SOCK_DGRAM
 15  * - SOCK_RAW
 18  * - SOCK_SEQPACKET
 21  * the other with option '-r' to put it in receiver mode.
 23  * If zerocopy mode ('-z') is enabled, the sender will verify that
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| /linux/Documentation/devicetree/bindings/net/ | 
| H A D | stm32-dwmac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)4 ---
 5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
 6 $schema: http://devicetree.org/meta-schemas/core.yaml#
 11   - Alexandre Torgue <alexandre.torgue@foss.st.com>
 12   - Christophe Roullier <christophe.roullier@foss.st.com>
 23           - st,stm32-dwmac
 24           - st,stm32mp1-dwmac
 25           - st,stm32mp13-dwmac
 26           - st,stm32mp25-dwmac
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| /linux/arch/arm64/boot/dts/airoha/ | 
| H A D | en7581.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 #include <dt-bindings/interrupt-controller/irq.h>
 4 #include <dt-bindings/interrupt-controller/arm-gic.h>
 5 #include <dt-bindings/clock/en7523-clk.h>
 6 #include <dt-bindings/reset/airoha,en7581-reset.h>
 9 	interrupt-parent = <&gic>;
 10 	#address-cells = <2>;
 11 	#size-cells = <2>;
 13 	reserved-memory {
 14 		#address-cells = <2>;
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| /linux/arch/arm64/boot/dts/st/ | 
| H A D | stm32mp253.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)3  * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
 11 			compatible = "arm,cortex-a35";
 14 			enable-method = "psci";
 15 			power-domains = <&CPU_PD1>;
 16 			power-domain-names = "psci";
 20 	arm-pmu {
 23 		interrupt-affinity = <&cpu0>, <&cpu1>;
 27 		CPU_PD1: power-domain-cpu1 {
 28 			#power-domain-cells = <0>;
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| H A D | stm32mp233.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)3  * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
 11 			compatible = "arm,cortex-a35";
 14 			enable-method = "psci";
 15 			power-domains = <&cpu1_pd>;
 16 			power-domain-names = "psci";
 20 	arm-pmu {
 23 		interrupt-affinity = <&cpu0>, <&cpu1>;
 27 		cpu1_pd: power-domain-cpu1 {
 28 			#power-domain-cells = <0>;
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