Searched +full:erratum +full:- +full:unknown1 (Results 1 – 2 of 2) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Marc Zyngier <marc.zyngier@arm.com>11 - Mark Rutland <mark.rutland@arm.com>13 ARM cores may have a per-core architected timer, which provides per-cpu timers,17 The per-core architected timer is attached to a GIC to deliver its18 per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC24 - items:25 - const: arm,cortex-a15-timer[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/sun50i-a64-ccu.h>7 #include <dt-bindings/clock/sun6i-rtc.h>8 #include <dt-bindings/clock/sun8i-de2.h>9 #include <dt-bindings/clock/sun8i-r-ccu.h>10 #include <dt-bindings/interrupt-controller/arm-gic.h>11 #include <dt-bindings/reset/sun50i-a64-ccu.h>12 #include <dt-bindings/reset/sun8i-de2.h>13 #include <dt-bindings/reset/sun8i-r-ccu.h>14 #include <dt-bindings/thermal/thermal.h>[all …]