Home
last modified time | relevance | path

Searched full:engines (Results 1 – 25 of 326) sorted by relevance

12345678910>>...14

/linux/drivers/platform/x86/
H A Dpcengines-apuv2.c4 * PC-Engines APUv2/APUv3 board platform driver
140 DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
149 DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
158 DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
159 DMI_MATCH(DMI_BOARD_NAME, "PC Engines apu2")
168 DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
177 DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
186 DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
187 DMI_MATCH(DMI_BOARD_NAME, "PC Engines apu3")
195 DMI_MATCH(DMI_SYS_VENDOR, "PC Engines"),
[all …]
/linux/drivers/net/ethernet/packetengines/
H A DKconfig3 # Packet Engines device configuration
7 bool "Packet Engines devices"
15 the questions about Packet Engines devices. If you say Y, you will
21 tristate "Packet Engines Hamachi GNIC-II support"
31 tristate "Packet Engines Yellowfin Gigabit-NIC support"
35 Say Y here if you have a Packet Engines G-NIC PCI Gigabit Ethernet
/linux/Documentation/devicetree/bindings/fsi/
H A Dfsi.txt5 engines within those slaves. However, we have a facility to match devicetree
6 nodes to probed engines. This allows for fsi engines to expose non-probeable
16 represent the FSI slaves and their slave engines. As a basic outline:
41 adding subordinate device tree nodes as children of FSI engines.
79 Each slave provides an address-space, under which the engines are accessible.
91 FSI engines (devices)
94 Engines are identified by their address under the slaves' address spaces. We
116 additional engines, but they don't necessarily need to be describe in the
/linux/Documentation/netlabel/
H A Dintroduction.rst15 is composed of three main components, the protocol engines, the communication
18 Protocol Engines
21 The protocol engines are responsible for both applying and retrieving the
25 refrain from calling the protocol engines directly, instead they should use
45 independent interface to the underlying NetLabel protocol engines. In addition
/linux/drivers/gpu/drm/xe/
H A Dxe_gt_ccs_mode.c33 * assignment of compute slices to compute engines would be, in __xe_gt_apply_ccs_mode()
38 * With 2 engines (ccs0, ccs1): in __xe_gt_apply_ccs_mode()
42 * With 4 engines (ccs0, ccs1, ccs2, ccs3): in __xe_gt_apply_ccs_mode()
131 * Ensure number of engines specified is valid and there is an in ccs_mode_store()
132 * exact multiple of engines for slices. in ccs_mode_store()
136 xe_gt_dbg(gt, "Invalid compute config, %d engines %d slices\n", in ccs_mode_store()
181 * number of compute hardware engines to which the available compute slices
H A Dxe_pci_types.h16 u64 hw_engine_mask; /* hardware engines provided by graphics IP */
28 u64 hw_engine_mask; /* hardware engines provided by media IP */
/linux/include/uapi/drm/
H A Di915_drm.h160 * Different engines serve different roles, and there may be more than one
163 * on a certain subset of engines, or for providing information about that
170 * Render engines support instructions used for 3D, Compute (GPGPU),
181 * Copy engines (also referred to as "blitters") support instructions
184 * Copy engines can perform pre-defined logical or bitwise operations
192 * Video engines (also referred to as "bit stream decode" (BSD) or
201 * Video enhancement engines (also referred to as "vebox") support
209 * Compute engines support a subset of the instructions available
210 * on render engines: compute engines support Compute (GPGPU) and
728 * value reports the support of context isolation for individual engines by
[all …]
H A Dxe_drm.h56 * │ │ │ └─DSS─┘ └─DSS─┘ └─DSS─┘ └─────Engines─────┘ │ │ │ │ │ │ │
260 * struct drm_xe_query_engines - describe engines
267 /** @num_engines: number of engines returned in @engines */
271 /** @engines: The returned engines for this device */
272 struct drm_xe_engine engines[]; member
452 * drm_xe_query_mem_regions that are nearest to the current engines
462 * drm_xe_query_mem_regions that are far from the engines of this GT.
699 * information about the device engines with DRM_XE_DEVICE_QUERY_ENGINES:
703 * struct drm_xe_query_engines *engines;
711 * engines = malloc(query.size);
[all …]
/linux/tools/include/uapi/drm/
H A Di915_drm.h160 * Different engines serve different roles, and there may be more than one
163 * on a certain subset of engines, or for providing information about that
170 * Render engines support instructions used for 3D, Compute (GPGPU),
181 * Copy engines (also referred to as "blitters") support instructions
184 * Copy engines can perform pre-defined logical or bitwise operations
192 * Video engines (also referred to as "bit stream decode" (BSD) or
201 * Video enhancement engines (also referred to as "vebox") support
209 * Compute engines support a subset of the instructions available
210 * on render engines: compute engines support Compute (GPGPU) and
728 * value reports the support of context isolation for individual engines by
[all …]
/linux/drivers/gpu/drm/xe/tests/
H A Dxe_pci_test.c22 /* RCS, CCS, and BCS engines are allowed on the graphics IP */ in check_graphics_ip()
27 /* Any remaining engines are an error */ in check_graphics_ip()
36 /* VCS, VECS and GSCCS engines are allowed on the media IP */ in check_media_ip()
41 /* Any remaining engines are an error */ in check_media_ip()
/linux/drivers/gpu/drm/i915/gt/
H A Dintel_engine_user.c82 struct list_head *engines) in sort_engines() argument
89 list_add(&engine->uabi_list, engines); in sort_engines()
91 list_sort(NULL, engines, engine_cmp); in sort_engines()
111 for_each_uabi_engine(engine, i915) { /* all engines must agree! */ in set_scheduler_caps()
210 LIST_HEAD(engines); in intel_engines_driver_register()
212 sort_engines(i915, &engines); in intel_engines_driver_register()
216 list_for_each_safe(it, next, &engines) { in intel_engines_driver_register()
221 continue; /* ignore incomplete engines */ in intel_engines_driver_register()
H A Dintel_gt_engines_debugfs.c27 DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(engines);
32 { "engines", &engines_fops }, in intel_gt_engines_debugfs_register()
/linux/drivers/gpu/drm/i915/gt/uc/
H A Dselftest_guc_multi_lrc.c13 static void logical_sort(struct intel_engine_cs **engines, int num_engines) in logical_sort() argument
20 if (engines[j]->logical_mask & BIT(i)) { in logical_sort()
21 sorted[i] = engines[j]; in logical_sort()
26 memcpy(*engines, *sorted, in logical_sort()
122 gt_dbg(gt, "Not enough engines in class: %d\n", class); in __intel_guc_multi_lrc_basic()
/linux/Documentation/devicetree/bindings/crypto/
H A Daspeed,ast2600-acry.yaml7 title: ASPEED ACRY ECDSA/RSA Hardware Accelerator Engines
13 The ACRY ECDSA/RSA engines is designed to accelerate the throughput
15 divided into two independent engines - ECC Engine and RSA Engine.
H A Daspeed,ast2500-hace.yaml7 title: ASPEED HACE hash and crypto Hardware Accelerator Engines
15 divided into two independently engines - Hash Engine and Crypto Engine.
/linux/drivers/gpu/drm/i915/
H A DKconfig.profile45 The driver sends a periodic heartbeat down all active engines to
70 certain platforms and certain engines which will be reflected in the
74 int "Preempt timeout for compute engines (ms, jiffy granularity)"
89 certain platforms and certain engines which will be reflected in the
/linux/Documentation/misc-devices/
H A Dmrvl_cn10k_dpi.rst12 mailbox logic, and a set of DMA engines & DMA command queues.
20 the DMA engines and VF device's DMA command queues. Also, driver creates
38 a pem port to which DMA engines are wired.
/linux/drivers/gpu/drm/radeon/
H A Dcik_sdma.c40 * DMA engines. These engines are used for compute
41 * and gfx. There are two DMA engines (SDMA0, SDMA1)
243 * cik_sdma_gfx_stop - stop the gfx async dma engines
284 * cik_sdma_rlc_stop - stop the compute async dma engines
301 * Halt or unhalt the async dma engines (CIK).
323 * cik_sdma_enable - stop the async dma engines
328 * Halt or unhalt the async dma engines (CIK).
357 * cik_sdma_gfx_resume - setup and start the async dma engines
440 * cik_sdma_rlc_resume - setup and start the async dma engines
520 * cik_sdma_resume - setup and start the async dma engines
[all …]
/linux/drivers/media/platform/xilinx/
H A Dxilinx-dma.h32 * @use_count: number of DMA engines using the pipeline
33 * @stream_count: number of DMA engines currently streaming
34 * @num_dmas: number of DMA engines in the pipeline
/linux/drivers/gpu/drm/omapdrm/
H A Domap_dmm_tiler.c290 if (dmm->engines[i].async) in omap_dmm_irq_handler()
291 release_engine(&dmm->engines[i]); in omap_dmm_irq_handler()
293 complete(&dmm->engines[i].compl); in omap_dmm_irq_handler()
471 * silently fail, leading to leaking DMM engines, which may eventually in fill()
472 * lead to deadlock if we run out of DMM engines. in fill()
751 kfree(omap_dmm->engines); in omap_dmm_remove()
885 /* alloc engines */ in omap_dmm_probe()
886 omap_dmm->engines = kcalloc(omap_dmm->num_engines, in omap_dmm_probe()
887 sizeof(*omap_dmm->engines), GFP_KERNEL); in omap_dmm_probe()
888 if (!omap_dmm->engines) { in omap_dmm_probe()
[all …]
/linux/drivers/dma/idxd/
H A Dinit.c274 engine = idxd->engines[i]; in idxd_clean_engines()
279 kfree(idxd->engines); in idxd_clean_engines()
289 idxd->engines = kcalloc_node(idxd->max_engines, sizeof(struct idxd_engine *), in idxd_setup_engines()
291 if (!idxd->engines) in idxd_setup_engines()
316 idxd->engines[i] = engine; in idxd_setup_engines()
323 engine = idxd->engines[i]; in idxd_setup_engines()
328 kfree(idxd->engines); in idxd_setup_engines()
565 dev_dbg(dev, "max engines: %u\n", idxd->max_engines); in idxd_read_caps()
830 * Save IDXD device configurations including engines, groups, wqs etc.
884 /* Free saved groups and engines */ in idxd_device_config_save()
[all …]
/linux/Documentation/ABI/testing/
H A Dsysfs-bus-hsi8 engines (APE) with cellular modem engines (CMT) in cellular
/linux/Documentation/arch/powerpc/
H A Dvas-api.rst14 unit comprises of one or more hardware engines or co-processor types
62 access to all GZIP engines in the system. The only valid operations on
79 engines (typically, one per P9 chip) there is just one
130 "Discovery of available VAS engines" section below.
168 that the application can use to copy/paste its CRB to the hardware engines.
190 Discovery of available VAS engines
/linux/arch/x86/platform/geode/
H A Dalix.c108 if (!vendor || strcmp(vendor, "PC Engines")) in alix_present_dmi()
123 const char tinybios_sig[] = "PC Engines ALIX."; in alix_init()
124 const char coreboot_sig[] = "PC Engines\0ALIX."; in alix_init()
/linux/Documentation/gpu/rfc/
H A Di915_scheduler.rst43 * Features like timeslicing / preemption / virtual engines would
104 * Export engines logical mapping
109 Export engines logical mapping
116 engines in logical order which is a new requirement compared to execlists.

12345678910>>...14