| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | motorola-cpcap-mapphone.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 10 interrupt-parent = <&gpio1>; 12 interrupt-controller; 13 #interrupt-cells = <2>; 14 #address-cells = <1>; 15 #size-cells = <0>; 16 spi-max-frequency = <9600000>; 17 spi-cs-high; 18 spi-cpol; 19 spi-cpha; [all …]
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| H A D | omap3-evm-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/input/input.h> 7 #include "omap-gpmc-smsc911x.dtsi" 12 cpu0-supply = <&vcc>; 18 compatible = "regulator-fixed"; 19 regulator-name = "hsusb2_vbus"; 20 regulator-min-microvolt = <3300000>; 21 regulator-max-microvolt = <3300000>; 23 startup-delay-us = <70000>; 24 enable-active-high; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8173-elm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/input/linux-event-codes.h> 8 #include <dt-bindings/regulator/dlg,da9211-regulator.h> 9 #include <dt-bindings/gpio/gpio.h> 25 compatible = "pwm-backlight"; 27 power-supply = <&bl_fixed_reg>; 28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&panel_backlight_en_pins>; [all …]
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| H A D | mt8186-corsola.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 7 #include <dt-bindings/pinctrl/mt8186-pinfunc.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/input/gpio-keys.h> 11 #include <dt-bindings/regulator/mediatek,mt6397-regulator.h> 26 stdout-path = "serial0:115200n8"; 35 backlight_lcd0: backlight-lcd0 { 36 compatible = "pwm-backlight"; [all …]
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| H A D | mt6795-sony-xperia-m5.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 14 compatible = "sony,xperia-m5", "mediatek,mt6795"; 15 chassis-type = "handset"; 26 compatible = "led-backlight"; 29 default-brightness-level = <300>; 32 led-controller-display { 33 compatible = "pwm-leds"; 35 disp_led_pwm: led-0 { [all …]
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| H A D | mt8195-cherry.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/spmi/spmi.h> 25 backlight_lcd0: backlight-lcd0 { 26 compatible = "pwm-backlight"; 27 brightness-levels = <0 1023>; 28 default-brightness-level = <576>; 29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>; 30 num-interpolated-steps = <1023>; 32 power-supply = <&ppvar_sys>; [all …]
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| H A D | mt8186-corsola-krabby.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 7 #include "mt8186-corsola.dtsi" 8 #include <dt-bindings/gpio/gpio.h> 17 remote-endpoint = <&ps8640_in>; 21 clock-frequency = <400000>; 23 edp-bridge@8 { 26 pinctrl-names = "default"; 27 pinctrl-0 = <&ps8640_pins>; 28 powerdown-gpios = <&pio 96 GPIO_ACTIVE_LOW>; [all …]
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| H A D | mt8173-elm-hana.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include "mt8173-elm.dtsi" 9 clock-frequency = <200000>; 16 interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>; 17 status = "fail-needs-probe"; 22 * Gen (MTK) are using synaptics touchscreen (hid-over-i2c driver) as a 26 compatible = "hid-over-i2c"; 28 hid-descr-addr = <0x0020>; 29 interrupts-extended = <&pio 88 IRQ_TYPE_LEVEL_LOW>; 30 status = "fail-needs-probe"; [all …]
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| H A D | mt8395-kontron-3-5-sbc-i1200.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 7 /dts-v1/; 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/leds/common.h> 15 #include <dt-bindings/pinctrl/mt8195-pinfunc.h> 16 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h> 17 #include <dt-bindings/spmi/spmi.h> 20 model = "Kontron 3.5\"-SBC-i1200"; 21 compatible = "kontron,3-5-sbc-i1200", "mediatek,mt8395", "mediatek,mt8195"; [all …]
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| H A D | mt8173-evb.dts | 1 // SPDX-License-Identifier: GPL-2.0-only 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 13 chassis-type = "embedded"; 14 compatible = "mediatek,mt8173-evb", "mediatek,mt8173"; 31 compatible = "hdmi-connector"; 37 remote-endpoint = <&hdmi0_out>; 43 compatible = "linux,extcon-usb-gpio"; 44 id-gpios = <&pio 16 GPIO_ACTIVE_HIGH>; 47 usb_p1_vbus: regulator-usb-p1 { [all …]
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| H A D | mt8183-kukui.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 21 stdout-path = "serial0:115200n8"; 25 compatible = "pwm-backlight"; 27 power-supply = <®_vsys>; 28 enable-gpios = <&pio 176 0>; 29 brightness-levels = <0 1023>; 30 num-interpolated-steps = <1023>; 31 default-brightness-level = <576>; [all …]
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| H A D | mt8192-asurada.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/spmi/spmi.h> 25 stdout-path = "serial0:115200n8"; 33 backlight_lcd0: backlight-lcd0 { 34 compatible = "pwm-backlight"; 36 power-supply = <&ppvar_sys>; 37 enable-gpios = <&pio 152 0>; 38 brightness-levels = <0 1023>; [all …]
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| H A D | mt8183-kukui-jacuzzi-pico6.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 /dts-v1/; 7 #include "mt8183-kukui-jacuzzi.dtsi" 8 #include "mt8183-kukui-audio-ts3a227e-max98357a.dtsi" 12 chassis-type = "convertible"; 13 compatible = "google,pico-sku2", "google,pico", "mediatek,mt8183"; 15 bt_wakeup: bt-wakeup { 16 compatible = "gpio-keys"; 17 pinctrl-names = "default"; 18 pinctrl-0 = <&bt_pins_wakeup>; [all …]
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| H A D | mt8192-asurada-hayato-r1.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 5 /dts-v1/; 6 #include "mt8192-asurada.dtsi" 10 chassis-type = "convertible"; 11 compatible = "google,hayato-rev1", "google,hayato", "mediatek,mt8192"; 15 function-row-physmap = < 44 bt_pins: bt-pins { 45 pins-bt-kill { 47 output-low; 50 pins-bt-wake { [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | arm,pl172.txt | 5 - compatible: Must be "arm,primecell" and exactly one from 8 - reg: Must contains offset/length value for controller. 10 - #address-cells: Must be 2. The partition number has to be encoded in the 11 first address cell and it may accept values 0..N-1 12 (N - total number of partitions). The second cell is the 15 - #size-cells: Must be set to 1. 17 - ranges: Must contain one or more chip select memory regions. 19 - clocks: Must contain references to controller clocks. 21 - clock-names: Must contain "mpmcclk" and "apb_pclk". 23 - clock-ranges: Empty property indicating that child nodes can inherit [all …]
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| H A D | arm,pl172.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/memory-controllers/arm,pl172.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Frank Li <Frank.Li@nxp.com> 18 - arm,pl172 19 - arm,pl175 20 - arm,pl176 22 - compatible 27 - enum: [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
| H A D | palmas-gpadc.txt | 15 11 DC-DC current probe (how does this work?) 22 - compatible : Must be "ti,palmas-gpadc". 23 - #io-channel-cells: Should be set to <1>. 25 Optional sub-nodes: 26 ti,channel0-current-microamp: Channel 0 current in uA. 28 ti,channel3-current-microamp: Channel 3 current in uA. 30 ti,enable-extended-delay: Enable extended delay. 35 compatible = "ti,twl6035-pmic", "ti,palmas-pmic"; 38 compatible = "ti,palmas-gpadc"; 42 #io-channel-cells = <1>; [all …]
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| H A D | ti,palmas-gpadc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/ti,palmas-gpadc.yaml# 5 $schema: http://devicetree.org/meta-schema [all...] |
| /freebsd/sys/contrib/device-tree/Bindings/regulator/ |
| H A D | richtek,rtmv20-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - ChiYuan Huang <cy_huang@richtek.com> 15 (Enable/Fai [all...] |
| /freebsd/sys/dev/bhnd/cores/pci/ |
| H A D | bhnd_pci.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 79 BHND_PCI_DEV(PCI, "Host-PCI bridge", BHND_DF_HOSTB), 80 BHND_PCI_DEV(PCI, "PCI-BHND bridge", BHND_DF_SOC), 81 BHND_PCI_DEV(PCIE, "PCIe-G1 Host-PCI bridge", BHND_DF_HOSTB), 82 BHND_PCI_DEV(PCIE, "PCIe-G1 PCI-BHND bridge", BHND_DF_SOC), 94 #define BHND_PCIE_MDIO_CTL_DELAY 10 /**< usec delay required between 96 #define BHND_PCIE_MDIO_RETRY_DELAY 2000 /**< usec delay before retrying 102 bhnd_bus_read_4((_sc)->mem_res, (_reg)) 104 bhnd_bus_write_4((_sc)->mem_res, (_reg), (_val)) [all …]
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| /freebsd/share/man/man4/ |
| H A D | dummynet.4 | 7 .Nd traffic shaper, bandwidth manager and delay emulator 30 .Bl -tag -width ".Dv IPFIREWALL_VERBOSE_LIMIT" -offset indent -compact 32 enable ipfirewall (if 36 enable firewall output 40 enable 48 .Bd -literal -offset indent 56 sum of the bandwidth-delay products and queue sizes of all configured 79 packet filter, and extended to
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| /freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
| H A D | imx6qp-prtwd3.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 16 stdout-path = &uart4; 29 clock_ksz8081: clock-ksz8081 { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <50000000>; 35 clock_ksz9031: clock-ksz9031 { 36 compatible = "fixed-clock"; [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | mediatek,mt6397.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sen Chu <sen.chu@mediatek.com> 11 - Macpaul Lin <macpaul.lin@mediatek.com> 15 Please see the sub-modules below for supported features. 18 - Regulators 19 - RTC 20 - ADC 21 - Audio codec [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sdm670-google-sargo.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Device tree for Google Pixel 3a, adapted from google-blueline device tree, 4 * xiaomi-lavender device tree, and oneplus-common device tree. 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/leds/common.h> 14 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 15 #include <dt-bindings/power/qcom-rpmpd.h> 20 /delete-node/ &mpss_region; [all …]
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| /freebsd/share/misc/ |
| H A D | scsi_modes | 35 # 'i' is a byte-sized integral types, followed by a field width of 38 # 'b' is a bit-sized integral type 39 # 't' is a bitfield type- followed by a bit field width 42 # 'z' values are null-padded strings 81 {Extended Self-Test Completion Time} i2 95 0x02 "Disconnect-Reconnect" { 109 0x15 "Extended"; 111 0x16 "Extended Device-Type Specific"; 154 0x18 "Protocol-Specific Logical Unit"; 156 0x19 "Protocol-Specific Port"; [all …]
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