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/linux/fs/ocfs2/
H A Dextent_map.c53 struct ocfs2_extent_map_item *emi; in __ocfs2_extent_map_lookup() local
57 list_for_each_entry(emi, &em->em_list, ei_list) { in __ocfs2_extent_map_lookup()
58 range = emi->ei_cpos + emi->ei_clusters; in __ocfs2_extent_map_lookup()
60 if (cpos >= emi->ei_cpos && cpos < range) { in __ocfs2_extent_map_lookup()
61 list_move(&emi->ei_list, &em->em_list); in __ocfs2_extent_map_lookup()
63 *ret_emi = emi; in __ocfs2_extent_map_lookup()
75 struct ocfs2_extent_map_item *emi; in ocfs2_extent_map_lookup() local
79 __ocfs2_extent_map_lookup(&oi->ip_extent_map, cpos, &emi); in ocfs2_extent_map_lookup()
80 if (emi) { in ocfs2_extent_map_lookup()
102 struct ocfs2_extent_map_item *emi, *n; ocfs2_extent_map_trunc() local
170 ocfs2_try_to_merge_extent_map(struct ocfs2_extent_map_item * emi,struct ocfs2_extent_map_item * ins) ocfs2_try_to_merge_extent_map() argument
218 struct ocfs2_extent_map_item *emi, *new_emi = NULL; ocfs2_extent_map_insert_rec() local
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/linux/Documentation/devicetree/bindings/interconnect/
H A Dmediatek,mt8183-emi.yaml4 $id: http://devicetree.org/schemas/interconnect/mediatek,mt8183-emi.yaml#
7 title: MediaTek External Memory Interface (EMI) Interconnect
13 EMI interconnect providers support system bandwidth requirements through
24 | |->| (EMI) | ---- | ----
41 - mediatek,mt8183-emi
42 - mediatek,mt8195-emi
/linux/drivers/platform/chrome/
H A Dcros_ec_lpc_mec.h32 /* EMI registers are relative to base */
45 * @base: MEC EMI Base address
46 * @end: MEC EMI End address
60 * cros_ec_lpc_mec_in_range() - Determine if addresses are in MEC EMI range.
71 * cros_ec_lpc_io_bytes_mec - Read / write bytes to MEC EMI port
H A Dcros_ec_lpc_mec.c16 * This mutex must be held while accessing the EMI unit. We can't rely on the
30 * cros_ec_lpc_mec_lock() - Acquire mutex for EMI
52 * cros_ec_lpc_mec_unlock() - Release mutex for EMI
73 * cros_ec_lpc_mec_emi_write_address() - Initialize EMI at a given address.
86 * cros_ec_lpc_mec_in_range() - Determine if addresses are in MEC EMI range.
112 * cros_ec_lpc_io_bytes_mec() - Read / write bytes to MEC EMI port.
/linux/drivers/clk/mxs/
H A Dclk-imx23.c31 #define EMI (CLKCTRL + 0x00a0) macro
85 clk32k, dri, pwm, filt, uart, ssp, gpmi, spdif, emi, saif, enumerator
94 cpu, hbus, xbus, emi, uart, enumerator
132 clks[emi_pll] = mxs_clk_div("emi_pll", "ref_emi", EMI, 0, 6, 28); in mx23_clocks_init()
133 clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29); in mx23_clocks_init()
148 clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31); in mx23_clocks_init()
H A Dclk-imx28.c33 #define EMI (CLKCTRL + 0x00f0) macro
140 ssp1, ssp2, ssp3, gpmi, spdif, emi, saif0, saif1, lcdif, etm, enumerator
149 cpu, hbus, xbus, emi, uart, enumerator
199 clks[emi_pll] = mxs_clk_div("emi_pll", "ref_emi", EMI, 0, 6, 28); in mx28_clocks_init()
200 clks[emi_xtal] = mxs_clk_div("emi_xtal", "ref_xtal", EMI, 8, 4, 29); in mx28_clocks_init()
219 clks[emi] = mxs_clk_gate("emi", "emi_sel", EMI, 31); in mx28_clocks_init()
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-lx2160a-qds.dts110 mdio@0 { /* Slot #1 (secondary EMI) */
116 mdio@1 { /* Slot #2 (secondary EMI) */
122 mdio@2 { /* Slot #3 (secondary EMI) */
128 mdio@3 { /* Slot #4 (secondary EMI) */
134 mdio@4 { /* Slot #5 (secondary EMI) */
140 mdio@5 { /* Slot #6 (secondary EMI) */
146 mdio@6 { /* Slot #7 (secondary EMI) */
152 mdio@7 { /* Slot #8 (secondary EMI) */
H A Dfsl-lx2162a-qds.dts120 mdio@0 { /* Slot #1 (secondary EMI) */
126 mdio@1 { /* Slot #2 (secondary EMI) */
132 mdio@2 { /* Slot #3 (secondary EMI) */
138 mdio@3 { /* Slot #4 (secondary EMI) */
144 mdio@4 { /* Slot #5 (secondary EMI) */
150 mdio@5 { /* Slot #6 (secondary EMI) */
156 mdio@6 { /* Slot #7 (secondary EMI) */
162 mdio@7 { /* Slot #8 (secondary EMI) */
/linux/drivers/usb/misc/
H A Demi26.c3 * Emagic EMI 2|6 usb audio interface firmware loader.
19 #define EMI26_PRODUCT_ID 0x0100 /* EMI 2|6 without firmware */
20 #define EMI26B_PRODUCT_ID 0x0102 /* EMI 2|6 without firmware */
104 /* Assert reset (stop the CPU in the EMI) */ in emi26_load_firmware()
126 /* 2. We upload the FPGA firmware into the EMI in emi26_load_firmware()
145 /* Assert reset (stop the CPU in the EMI) */ in emi26_load_firmware()
179 /* Assert reset (stop the CPU in the EMI) */ in emi26_load_firmware()
252 MODULE_DESCRIPTION("Emagic EMI 2|6 firmware loader.");
H A Demi62.c3 * Emagic EMI 2|6 usb audio interface firmware loader.
29 #define EMI62_PRODUCT_ID 0x0110 /* EMI 6|2m without firmware */
110 /* Assert reset (stop the CPU in the EMI) */ in emi62_load_firmware()
133 /* 2. We upload the FPGA firmware into the EMI in emi62_load_firmware()
152 /* Assert reset (stop the CPU in the EMI) */ in emi62_load_firmware()
186 /* Assert reset (stop the CPU in the EMI) */ in emi62_load_firmware()
265 MODULE_DESCRIPTION("Emagic EMI 6|2m firmware loader.");
H A DKconfig37 tristate "EMI 6|2m USB Audio interface support"
39 This driver loads firmware to Emagic EMI 6|2m low latency USB
51 tristate "EMI 2|6 USB Audio interface support"
53 This driver loads firmware to Emagic EMI 2|6 low latency USB
/linux/Documentation/devicetree/bindings/arm/mediatek/
H A Dmediatek,mt7622-wed.yaml36 - description: firmware EMI region
44 - const: wo-emi
101 memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
/linux/Documentation/devicetree/bindings/iommu/
H A Dmediatek,iommu.yaml20 EMI (External Memory Interface)
53 access EMI. SMI is a bridge between m4u and the Multimedia HW. It contain
56 directly with EMI. And also SMI help control the power domain and clocks for
/linux/sound/soc/sof/mediatek/mt8186/
H A Dmt8186.h73 #define DSP_C0_EMI_MAP_ADDR 0xA00 /* ADSP Core0 To EMI Address Remap */
74 #define DSP_C0_DMAEMI_MAP_ADDR 0xA08 /* DMA0 To EMI Address Remap */
/linux/arch/arm/boot/dts/st/
H A Dspear310-evb.dts52 emi {
54 st,function = "emi";
/linux/drivers/interconnect/mediatek/
H A Dicc-emi.c3 * MediaTek External Memory Interface (EMI) Interconnect driver
18 #include "icc-emi.h"
H A DMakefile3 obj-$(CONFIG_INTERCONNECT_MTK_DVFSRC_EMI) += icc-emi.o
H A DKconfig10 tristate "MediaTek DVFSRC EMI interconnect driver"
H A Dicc-emi.h12 * struct mtk_icc_node - Mediatek EMI Interconnect Node
/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dmediatek,smi-common.yaml25 SMI generation 1 to transform the smi clock into emi clock domain, but that is
69 into the emi clock domain on Gen1 h/w, or the path0 clock of gals.
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dpinctrl_spear.txt134 "emi", "uart1", "uart2", "uart3", "uart4", "uart5", "fsmc", "rs485_0",
138 "clcd", "emi", "fsmc", "spp", "sdhci", "i2s", "uart1", "uart1_modem",
/linux/arch/arm/mach-imx/
H A Dmx3x.h29 * FC320000 B8000000 64K NAND, SDRAM, WEIM, M3IF, EMI controllers
127 * NAND, SDRAM, WEIM, M3IF, EMI controllers
/linux/drivers/edac/
H A Dbluefield_edac.c21 * Mellanox BlueField EMI (External Memory Interface) register definitions.
387 * the driver uses to access the EMI registers: in bluefield_edac_mc_probe()
414 dev_err(dev, "failed to map EMI IO resource\n"); in bluefield_edac_mc_probe()
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi82 wo_emi0: wo-emi@4fd00000 {
87 wo_emi1: wo-emi@4fd40000 {
506 memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
519 memory-region-names = "wo-emi", "wo-ilm", "wo-dlm",
/linux/Documentation/devicetree/bindings/clock/
H A Dimx23-clock.yaml55 emi 36

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