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/illumos-gate/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_devinfo.c45 return pdev->vars.last_recycling_timestamp; in lm_get_timestamp_of_recent_cid_recycling()
54 return pdev->params.max_supported_toe_cons; in lm_get_max_supported_toe_cons()
63 return (pdev->params.l4_rss_is_possible != L4_RSS_DISABLED); in lm_get_toe_rss_possibility()
79 // This is a pointer so it doesn't load the stack. in lm_get_iscsi_boot_info_block()
80 // If we delete these lines we won't have shmem_region_t symbols in lm_get_iscsi_boot_info_block()
102 if (pdev->hw_info.mcp_detected == 1) in lm_get_iscsi_boot_info_block()
106 iscsi_info_block_hdr_ptr->signature = val ; in lm_get_iscsi_boot_info_block()
112 SET_FLAGS(iscsi_info_block_hdr_ptr->boot_flags, BOOT_INFO_FLAGS_UEFI_BOOT ); in lm_get_iscsi_boot_info_block()
116 RESET_FLAGS(iscsi_info_block_hdr_ptr->boot_flags, BOOT_INFO_FLAGS_UEFI_BOOT ); in lm_get_iscsi_boot_info_block()
122 iscsi_info_block_hdr_ptr->signature = 0; in lm_get_iscsi_boot_info_block()
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/illumos-gate/usr/src/uts/common/io/qede/579xx/drivers/ecore/
H A Drelease.txt2 R E L E A S E N O T E S
11 ------
12 1. Problem: CQ92630 - NULL pointer dereference in query stats flow
26 ------
37 2. Problem: CQ92434 - system crash after loading qedr with MTU=128.
45 3. Problem: CQ91521 - System hits assertion while trying to modify Jumbo
48 Change: OSAL_IOV_VF_VPORT_STOP is introduced to allow upper-client to
55 4. Problem: CQ91595 - Firmware stop sending packets for some time after
64 5. Problem: CQ92301, CQ92431, CQ92465 - Firmware assertion may happen when
73 6. Problem: CQ92424 - When peer is unreachable, connection tear-down may
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/illumos-gate/usr/src/uts/common/io/qede/579xx/hsi/hw/
H A Dreg_addr_bb.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
84- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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H A Dreg_addr_k2.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
84- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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H A Dreg_addr_e5.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
84- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
85 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
86 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
87 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
89 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
91 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
99 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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H A Dreg_addr_ah_compile15.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
85 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
87 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
96 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
98 … has_mem_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
144 …_SYS_ERR (0x1<<30) // Fatal or Non-Fatal Error Message s…
148 …:0x20 This is the PCIE compliant status/command register (bits 31-16: status, bits 15-0: command)…
149 …:0x20 This is the PCIE compliant status/command register (bits 31-16: status, bits 15-0: command)…
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H A Dreg_addr.h9 * or http://opensource.org/licenses/CDDL-1.0.
23 * Copyright 2014-2017 Cavium, Inc.
30 * at http://opensource.org/licenses/CDDL-1.0
85- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
86 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
87 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
88 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
90 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
92 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
100 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
[all …]